Issued Patents All Time
Showing 26–50 of 166 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10534611 | Branch prediction using multi-way pattern history table (PHT) and global path vector (GPV) | James J. Bonanno, Matthias D. Heizmann, Daniel Lipetz | 2020-01-14 |
| 10489152 | Stochastic rounding floating-point add instruction using entropy from a register | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2019-11-26 |
| 10489153 | Stochastic rounding floating-point add instruction using entropy from a register | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2019-11-26 |
| 10489209 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2019-11-26 |
| 10481912 | Variable branch target buffer (BTB) line size for compression | James J. Bonanno, Michael J. Cadigan, Jr. | 2019-11-19 |
| 10445066 | Stochastic rounding floating-point multiply instruction using entropy from a register | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2019-10-15 |
| 10437597 | Silent mode and resource reassignment in branch prediction logic | James J. Bonanno, Adam B. Collura, Daniel Lipetz, Anthony Saporito | 2019-10-08 |
| 10346172 | Caching of perceptron branch patterns using ternary content addressable memory based on a most influential bit location in a branch history vector | James J. Bonanno | 2019-07-09 |
| 10338923 | Branch prediction path wrong guess instruction | Philip G. Emma, Allan M. Hartstein, Keith N. Langston, Thomas R. Puzak, Charles F. Webb | 2019-07-02 |
| 10275246 | Programmable linear feedback shift register | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2019-04-30 |
| 10261791 | Bypassing memory access for a load instruction using instruction address mapping | David A. Schroter, Chung-Lung K. Shum, Corey C Stappenbeck | 2019-04-16 |
| 10209958 | Reproducible stochastic rounding for out of order processors | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2019-02-19 |
| 10185570 | Dynamic thread sharing in branch prediction structures | James J. Bonanno, Daniel Lipetz, Anthony Saporito | 2019-01-22 |
| 10083008 | Reproducible stochastic rounding for out of order processors | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2018-09-25 |
| 10007523 | Predicting cache misses using data access behavior and instruction address | Vijayalakshmi Srinivasan | 2018-06-26 |
| 9940102 | Partial stochastic rounding that includes sticky and guard bits | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2018-04-10 |
| 9934040 | Perceptron branch predictor with virtualized weights | James J. Bonanno, Michael J. Cadigan, Jr., Adam B. Collura, Matthias D. Heizmann, Daniel Lipetz | 2018-04-03 |
| 9928132 | Dynamic accessing of execution elements through modification of issue rules | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2018-03-27 |
| 9916159 | Programmable linear feedback shift register | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2018-03-13 |
| 9904554 | Checkpoints for a simultaneous multithreading processor | Adam B. Collura, Anthony Saporito | 2018-02-27 |
| 9898299 | Dynamic thread sharing in branch prediction structures | James J. Bonanno, Daniel Lipetz, Anthony Saporito | 2018-02-20 |
| 9880811 | Reproducible stochastic rounding for out of order processors | Jonathan D. Bradbury, Steven R. Carlough, Eric M. Schwarz | 2018-01-30 |
| 9875107 | Accelerated execution of execute instruction target | Khary J. Alexander, Fadi Y. Busaba, Brian W. Curran, David S. Hutton, Edward T. Malley +1 more | 2018-01-23 |
| 9864639 | Management of resources within a computing environment | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2018-01-09 |
| 9798545 | Anticipated prefetching for a parent core in a multi-core chip | Fadi Y. Busaba, Steven R. Carlough, Christopher A. Krygowski, Chung-Lung K. Shum | 2017-10-24 |