XC

Xiuyu Cai

Globalfoundries: 157 patents #5 of 4,424Top 1%
IBM: 109 patents #491 of 70,183Top 1%
SS Stmicroelectronics Sa: 51 patents #13 of 1,676Top 1%
IL Illumina: 13 patents #85 of 799Top 15%
GU Globalfoundries U.S.: 1 patents #22 of 211Top 15%
📍 San Diego, CA: #126 of 23,606 inventorsTop 1%
🗺 California: #737 of 386,348 inventorsTop 1%
Overall (All Time): #4,471 of 4,157,543Top 1%
175
Patents All Time

Issued Patents All Time

Showing 51–75 of 175 patents

Patent #TitleCo-InventorsDate
9793171 Buried source-drain contact for integrated circuit transistor devices and method of making same Qing Liu, Ruilong Xie, Chun-Chen Yeh, William J. Taylor, Jr. 2017-10-17
9773867 FinFET semiconductor devices with replacement gate structures Ruilong Xie, Kangguo Cheng, Ali Khakifirooz 2017-09-26
9755031 Trench epitaxial growth for a FinFET device having reduced capacitance Qing Liu, Ruilong Xie, Chun-Chen Yeh 2017-09-05
9748352 Multi-channel gate-all-around FET Qing Liu, Ruilong Xie, Chun-Chen Yeh 2017-08-29
9685555 High-reliability, low-resistance contacts for nanoscale transistors Qing Liu, Nicolas Loubet, Chun-Chen Yeh, Ruilong Xie 2017-06-20
9666791 Topological method to build self-aligned MTJ without a mask Xunyuan Zhang, Ruilong Xie, Seowoo Nam, Hyun-Jin Cho 2017-05-30
9660050 Replacement low-k spacer Kangguo Cheng, Ali Khakifirooz, Ruilong Xie 2017-05-23
9660083 LDMOS finFET device and method of manufacture using a trench confined epitaxial growth process Qing Liu, Ruilong Xie, Chun-Chen Yeh 2017-05-23
9660057 Method of forming a reduced resistance fin structure Qing Liu, Ruilong Xie, Chun-Chen Yeh, Kejia Wang 2017-05-23
9653579 Method for making semiconductor device with filled gate line end recesses Qing Liu, Ruilong Xie, Chun-Chen Yeh, Kejia Wang 2017-05-16
9634115 Methods of forming a protection layer on a semiconductor device and the resulting device Ruilong Xie, Chanro Park 2017-04-25
9634004 Forming reliable contacts on tight semiconductor pitch Kangguo Cheng, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita 2017-04-25
9633906 Gate structure cut after formation of epitaxial active regions Kangguo Cheng, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert, Ruilong Xie 2017-04-25
9627377 Self-aligned dielectric isolation for FinFET devices Marc A. Bergendahl, Kangguo Cheng, David V. Horak, Ali Khakifirooz, Shom Ponoth +4 more 2017-04-18
9620505 Semiconductor device with different fin sets Qing Liu, Ruilong Xie, Chun-Chen Yeh, Kejia Wang, Daniel Chanemougame 2017-04-11
9601387 Method of making threshold voltage tuning using self-aligned contact cap Chanro Park, Hoon Kim 2017-03-21
9583597 Asymmetric FinFET semiconductor devices and methods for fabricating the same Ruilong Xie, Kangguo Cheng, Ali Khakifirooz 2017-02-28
9576956 Method and structure of forming controllable unmerged epitaxial material Kangguo Cheng, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita 2017-02-21
9570583 Recessing RMG metal gate stack for forming self-aligned contact Kangguo Cheng, Ali Khakifirooz, Ruilong Xie 2017-02-14
9564501 Reduced trench profile for a gate Qing Liu, Ruilong Xie, Chun-Chen Yeh 2017-02-07
9564358 Forming reliable contacts on tight semiconductor pitch Kangguo Cheng, Ali Khakifirooz, Ruilong Xie, Tenko Yamashita 2017-02-07
9559018 Dual channel finFET with relaxed pFET region Qing Liu, Ruilong Xie, Chun-Chen Yeh 2017-01-31
9559009 Gate structure cut after formation of epitaxial active regions Kangguo Cheng, Johnathan E. Faltermeier, Ali Khakifirooz, Theodorus E. Standaert, Ruilong Xie 2017-01-31
9543426 Semiconductor devices with self-aligned contacts and low-k spacers Ruilong Xie, Kangguo Cheng, Ali Khakifirooz 2017-01-10
9536981 Field effect transistor device spacers Sanjay C. Mehta, Tenko Yamashita 2017-01-03