Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12261081 | Tungsten feature fill with inhibition control | Tsung-Han Yang, Gang Liu, Anand Chandrashekar | 2025-03-25 |
| 12002679 | High step coverage tungsten deposition | Tsung-Han Yang, Anand Chandrashekar, Xing Zhang | 2024-06-04 |
| 10977405 | Fill process optimization using feature scale modeling | Atashi Basu, Kapil Sawlani, Dongyao Li, Anand Chandrashekar, David M. Fried +1 more | 2021-04-13 |
| 8081570 | High speed flow control methodology | — | 2011-12-20 |
| 8000324 | Pipeline architecture of a network device | Anupam Anand, John Jeffrey Dull, Eric Baden | 2011-08-16 |
| 7986616 | System and method for maintaining a layer 2 modification buffer | Eric Baden, John Jeffrey Dull, Curt McDowell | 2011-07-26 |
| 7583588 | System and method for maintaining a layer 2 modification buffer | Eric Baden, John Jeffrey Dull, Curt McDowell | 2009-09-01 |
| 7539134 | High speed flow control methodology | — | 2009-05-26 |
| 7366208 | Network switch with high-speed serializing/deserializing hazard-free double data rate switch | — | 2008-04-29 |
| 6859454 | Network switch with high-speed serializing/deserializing hazard-free double data rate switching | — | 2005-02-22 |
| 5828856 | Dual bus concurrent multi-channel direct memory access controller and method | Brian A. Childers | 1998-10-27 |
| 5805927 | Direct memory access channel architecture and method for reception of network information | Brian A. Childers | 1998-09-08 |
| 5655151 | DMA controller having a plurality of DMA channels each having multiple register sets storing different information controlling respective data transfer | Brian A. Childers | 1997-08-05 |
| 5546547 | Memory bus arbiter for a computer system having a dsp co-processor | Farid A. Yazdy | 1996-08-13 |