Issued Patents All Time
Showing 101–125 of 139 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6140187 | Process for forming metal oxide semiconductors including an in situ furnace gate stack with varying silicon nitride deposition rate | Damon K. DeBusk, Gregg Higashi, Nancy Xianghong Zhao | 2000-10-31 |
| 6130150 | Method of making a semiconductor device with barrier and conductor protection | Sailesh Mansinh Merchant, Sudhanshu Misra | 2000-10-10 |
| 6114234 | Method of making a semiconductor with copper passivating film | Sailesh Mansinh Merchant, Sudhanshu Misra | 2000-09-05 |
| 6103586 | Method for making integrated circuit capacitor including anchored plugs | Sundar Srinivasan Chetlur, James T. Clemens, Sailesh Mansinh Merchant, Hem M. Vaidya | 2000-08-15 |
| 6103607 | Manufacture of MOSFET devices | Isik C. Kizilayalli, Sailesh Mansinh Merchant | 2000-08-15 |
| 6100587 | Silicon carbide barrier layers for porous low dielectric constant materials | Sailesh Mansinh Merchant, Sudhanshu Misra | 2000-08-08 |
| 6090686 | Locos isolation process using a layered pad nitride and dry field oxidation stack and semiconductor device employing the same | David C. Brady, Isik C. Kizilyalli, Hem M. Vaidya | 2000-07-18 |
| 6074933 | Integrated circuit fabrication | Yi Ma | 2000-06-13 |
| 6071808 | Method of passivating copper interconnects in a semiconductor | Sailesh Mansinh Merchant, Sudhanshu Misra | 2000-06-06 |
| 6025280 | Use of SiD.sub.4 for deposition of ultra thin and controllable oxides | David C. Brady, Isik C. Kizilyalli, Yi Ma | 2000-02-15 |
| 6011404 | System and method for determining near--surface lifetimes and the tunneling field of a dielectric in a semiconductor | Yi Ma | 2000-01-04 |
| 6008091 | Floating gate avalanche injection MOS transistors with high K dielectric control gates | Richard W. Gregor, Isik C. Kizilyalli | 1999-12-28 |
| 5981403 | Layered silicon nitride deposition process | Yi Ma, Sailesh Mansinh Merchant | 1999-11-09 |
| 5960302 | Method of making a dielectric for an integrated circuit | Yi Ma, Kevin Yun-Kang Wu | 1999-09-28 |
| D414310 | Shaped food product | — | 1999-09-28 |
| 5940736 | Method for forming a high quality ultrathin gate oxide layer | David C. Brady, Yi Ma | 1999-08-17 |
| 5908312 | Semiconductor device fabrication | Kin P. Cheung, Steven J. Hillenius, Chun-Ting Liu, Yi Ma | 1999-06-01 |
| 5641994 | Multilayered A1-alloy structure for metal conductors | Cheryl Anne Bollinger, Edward Dein, Sailesh Mansinh Merchant, Arun K. Nanda, Cletus W. Wilkins, Jr. | 1997-06-24 |
| 5599739 | Barrier layer treatments for tungsten plug | Sailesh Mansinh Merchant, Arun K. Nanda | 1997-02-04 |
| 5573965 | Method of fabricating semiconductor devices and integrated circuits using sidewall spacer technology | Min-Liang Chen, Sailesh Chittipeddi, Taeho Kook, Richard A. Powell | 1996-11-12 |
| 5561083 | Method of making multilayered Al-alloy structure for metal conductors | Cheryl Anne Bollinger, Edward Dein, Sailesh Mansinh Merchant, Arun K. Nanda, Cletus W. Wilkins, Jr. | 1996-10-01 |
| 5523259 | Method of forming metal layers formed as a composite of sub-layers using Ti texture control layer | Sailesh Mansinh Merchant, Arun K. Nanda | 1996-06-04 |
| 5505978 | Baked corn-based product and process | Gary Moore | 1996-04-09 |
| 5489552 | Multiple layer tungsten deposition process | Sailesh Mansinh Merchant, Arun K. Nanda | 1996-02-06 |
| 5322807 | Method of making thin film transistors including recrystallization and high pressure oxidation | Min-Liang Chen | 1994-06-21 |