Issued Patents All Time
Showing 51–67 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7568118 | Deterministic operation of an input/output interface | Warren Anderson, Richard Marc Watson, Horst Wagner, Christopher C. Gianos, Suresh Balasubramanian +1 more | 2009-07-28 |
| 7362739 | Methods and apparatuses for detecting clock failure and establishing an alternate clock lane | Naveen Cherukuri, Tim Frodsham, Eduard Roytman, Sanjay Dabral, Rahul R. Shah +2 more | 2008-04-22 |
| 7200770 | Restoring access to a failed data storage device in a redundant memory system | David W. Hartwell | 2007-04-03 |
| 7024533 | Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature | Richard E. Kessler, Peter J. Bannon, Scott E. Breach, Allen J. Baum, Gregg A. Bouchard | 2006-04-04 |
| 6920512 | Computer architecture and system for efficient management of bi-directional bus | Richard E. Kessler, Gregg A. Bouchard | 2005-07-19 |
| 6754739 | Computer resource management and allocation system | Richard E. Kessler, Michael Bertone, Gregg A. Bouchard | 2004-06-22 |
| 6704817 | Computer architecture and system for efficient management of bi-directional bus | Richard E. Kessler, Gregg A. Bouchard | 2004-03-09 |
| 6662265 | Mechanism to track all open pages in a DRAM memory system | Richard E. Kessler, Michael Bertone, Peter J. Bannon, Gregg A. Bouchard | 2003-12-09 |
| 6636955 | Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature | Richard E. Kessler, Peter J. Bannon, Scott E. Breach, Allen J. Baum, Gregg A. Bouchard | 2003-10-21 |
| 6622225 | System for minimizing memory bank conflicts in a computer system | Richard E. Kessler, Michael Bertone, Michael C. Braganza, Gregg A. Bouchard | 2003-09-16 |
| 6591349 | Mechanism to reorder memory read and write transactions for reduced latency and increased bandwidth | Gregg A. Bouchard | 2003-07-08 |
| 6546453 | Proprammable DRAM address mapping mechanism | Richard E. Kessler, Peter J. Bannon, Michael C. Braganza, Gregg A. Bouchard | 2003-04-08 |
| 6353877 | Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line write | Samuel H. Duncan, Glenn Arthur Herdeg, Ricky C. Hetherington, Craig D. Keefer, Paul Michael Guglielmi | 2002-03-05 |
| 6128711 | Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writes | Samuel H. Duncan, Glenn Arthur Herdeg, Ricky C. Hetherington, Craig D. Keefer, Paul Michael Guglielmi | 2000-10-03 |
| 5638538 | Turbotable: apparatus for directing address and commands between multiple consumers on a node coupled to a pipelined system bus | Stephen R. VanDoren, Denis Foley | 1997-06-10 |
| 5559987 | Method and apparatus for updating a duplicate tag status in a snoop bus protocol based computer system | Denis Foley, Stephen R. VanDoren | 1996-09-24 |
| 4995041 | Write back buffer with error correcting capabilities | Ricky C. Hetherington, Tryggve Fossum, David A. Webb | 1991-02-19 |