Issued Patents All Time
Showing 26–50 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9043625 | Processor bridge power management | Alexander J. Branover, Denis Foley, Ljubisa Bajic | 2015-05-26 |
| 9021209 | Cache flush based on idle prediction and probe activity level | Alexander J. Branover | 2015-04-28 |
| 8966305 | Managing processor-state transitions | Alexander J. Branover, John P. Petry | 2015-02-24 |
| 8959372 | Dynamic performance control of processing nodes | Alexander J. Branover, William L. Bircher | 2015-02-17 |
| 8924758 | Method for SOC performance and power optimization | Alexander J. Branover, Guhan Krishnan | 2014-12-30 |
| 8862920 | Power state management of an input/output servicing component of a processor system | Alexander J. Branover | 2014-10-14 |
| 8832485 | Method and apparatus for cache control | Alexander J. Branover, Norman M. Hack, John Kalamatianos, Jonathan Owen | 2014-09-09 |
| 8656198 | Method and apparatus for memory power management | Alexander J. Branover, Anthony Asaro, James B. Fry | 2014-02-18 |
| 8645639 | Hierarchical memory arbitration technique for disparate sources | Guhan Krishnan, Antonio Asaro, Don Cherepacha, Thomas Kunjan, Joerg Winkler +3 more | 2014-02-04 |
| 8566628 | North-bridge to south-bridge protocol for placing processor in low power state | Alexander J. Branover, Ming L. So, Xiao Gang Zheng | 2013-10-22 |
| 8484498 | Method and apparatus for demand-based control of processing node performance | Alexander J. Branover, William L. Bircher | 2013-07-09 |
| 8412971 | Method and apparatus for cache control | Alexander J. Branover, Norman M. Hack, John Kalamatianos, Jonathan Owen | 2013-04-02 |
| 8291249 | Method and apparatus for transitioning devices between power states based on activity request frequency | Alexander J. Branover, Denis Rystsov, Jonathan Owen, Denis Foley | 2012-10-16 |
| 8266389 | Hierarchical memory arbitration technique for disparate sources | Guhan Krishnan, Antonio Asaro, Don Cherepacha, Thomas Kunjan, Joerg Winkler +3 more | 2012-09-11 |
| 8176352 | Clock domain data transfer device and methods thereof | Kevin M. Gillespie, Guhan Krishnan, Spencer Gold, Bill K. C. Kwan | 2012-05-08 |
| 8156362 | Hardware monitoring and decision making for transitioning in and out of low-power state | Alexander J. Branover, Frank P. Helms | 2012-04-10 |
| 8135935 | ECC implementation in non-ECC components | Michael Haertel, R. Stephen Polzin, Andrej Kocev | 2012-03-13 |
| 8112648 | Enhanced control of CPU parking and thread rescheduling for maximizing the benefits of low-power state | Alexander J. Branover, Denis Rystsov | 2012-02-07 |
| 8112647 | Protocol for power state determination and demotion | Alexander J. Branover, Frank P. Helms, John P. Petry | 2012-02-07 |
| 7957428 | Methods and apparatuses to effect a variable-width link | Rahul R. Shah, Naveen Cherukuri, Aaron T. Spink, Allen J. Baum, Sanjay Dabral +3 more | 2011-06-07 |
| 7941683 | Data processing device with low-power cache access mode | Alex Branover, Frank P. Helms | 2011-05-10 |
| 7870407 | Dynamic processor power management device and method thereof | Alex Branover, Frank P. Helms, Jonathan Owen, Kurt Lewchuk, Paul A. Mackey | 2011-01-11 |
| 7856562 | Selective deactivation of processor cores in multiple processor core systems | Alexander J. Branover, Frank P. Helms, Bill K. C. Kwan, W. Kurt Lewchuk, Paul A. Mackey | 2010-12-21 |
| 7844767 | Method for identifying bad lanes and exchanging width capabilities of two CSI agents connected across a link | Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn +1 more | 2010-11-30 |
| 7750912 | Integrating display controller into low power processor | R. Stephen Polzin, Richard T. Witek | 2010-07-06 |