Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8850278 | Fault tolerant scannable glitch latch | Joseph Siegel, Dwight K. Elvey, Harry Ray Fair, III | 2014-09-30 |
| 8656339 | Method for analyzing sensitivity and failure probability of a circuit | Timothy J. Correia, Donald A. Priore | 2014-02-18 |
| 8176352 | Clock domain data transfer device and methods thereof | Guhan Krishnan, Maurice B. Steinman, Spencer Gold, Bill K. C. Kwan | 2012-05-08 |