Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11875100 | Distributed parallel processing routing | Satish B. Sivaswamy, Ashot Shakhkyan, Nitin Deshmukh, Garik Mkrtchyan, Bhasker Pinninti | 2024-01-16 |
| 11106851 | Serialization in electronic design automation flows | Paul D. Kundarewich, Grigor S. Gasparyan, Mehrdad Eslami Dehkordi, Xiao Dong | 2021-08-31 |
| 11003827 | Multiprocessing flow and massively multi-threaded flow for multi-die devices | Paul D. Kundarewich, Grigor S. Gasparyan, Mehrdad Eslami Dehkordi, Zhaoxuan Shen, Amish Pandya | 2021-05-11 |
| 10891413 | Incremental initialization by parent and child placer processes in processing a circuit design | Paul D. Kundarewich, Grigor S. Gasparyan, Mehrdad Eslami Dehkordi | 2021-01-12 |
| 10416232 | Timing optimizations in circuit designs using opposite clock edge triggered flip-flops | Parivallal Kannan | 2019-09-17 |
| 9881112 | Vectorless dynamic power estimation for sequential circuits | Fan Zhang, Anup Kumar Sultania | 2018-01-30 |
| 8312405 | Method of placing input/output blocks on an integrated circuit device | Victor Z. Slonim, Rajat Aggarwal, Srinivasan Dasasathyan | 2012-11-13 |
| 8082532 | Placing complex function blocks on a programmable integrated circuit | Rajat Aggarwal | 2011-12-20 |
| 8010924 | Assignment of select input/output blocks to banks for integrated circuits using integer linear programming with proximity optimization | Victor Z. Slonim, Parivallal Kannan | 2011-08-30 |
| 7958480 | Placement of I/O blocks within I/O banks using an integer linear programming formulation | Victor Z. Slonim, Parivallal Kannan | 2011-06-07 |
| 7512922 | Methods of structured placement of a circuit design | — | 2009-03-31 |
| 7392499 | Placement of input/output blocks of an electronic design in an integrated circuit | Srinivasan Dasasathyan | 2008-06-24 |
| 7313778 | Method system and apparatus for floorplanning programmable logic designs | Srinivasan Dasasathyan, Rajat Aggarwal, James L. Saunders | 2007-12-25 |
| 7149993 | Method, system, and apparatus for incremental design in programmable logic devices using floorplanning | Rajat Aggarwal, Srinivasan Dasasathyan | 2006-12-12 |
| 7143380 | Method for application of network flow techniques under constraints | Jason H. Anderson, Sudip K. Nag, Srinivasan Dasasathyan | 2006-11-28 |
| 7072815 | Relocation of components for post-placement optimization | Kamal Chaudhary, Krishnan Anandh, Sudip K. Nag | 2006-07-04 |
| 6983439 | Unified placer infrastructure | James L. Saunders, Krishnan Anandh, Sudip K. Nag, Jason H. Anderson | 2006-01-03 |
| 6957406 | Analytical placement methods with minimum preplaced components | — | 2005-10-18 |
| 6857115 | Placement of objects with partial shape restriction | Srinivasan Dasasathyan, Sudip K. Nag, Jason H. Anderson | 2005-02-15 |
| 6789244 | Placement of clock objects under constraints | Srinivasan Dasasathyan, Sudip K. Nag | 2004-09-07 |