Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11709521 | Synchronous clock domain crossing skew optimization and multi-clock buffer (MBUFG) | Frederic Revenu, Frank Mueller, Thomas O. Satter, Garik Mkrtchyan, Satish B. Sivaswamy +2 more | 2023-07-25 |
| 11106851 | Serialization in electronic design automation flows | Paul D. Kundarewich, Grigor S. Gasparyan, Guenter Stenz, Xiao Dong | 2021-08-31 |
| 10891413 | Incremental initialization by parent and child placer processes in processing a circuit design | Paul D. Kundarewich, Grigor S. Gasparyan, Guenter Stenz | 2021-01-12 |
| 10860765 | Clock tree routing in programmable logic device | Wuxi Li, Xiaojian Yang | 2020-12-08 |
| 10068048 | Generating clock trees for a circuit design | Marvin Tom, Sridhar Krishnamurthy, Frank Mueller | 2018-09-04 |
| 10042971 | Placement and routing of clock signals for a circuit design | Raoul Badaoui, Marvin Tom, Sridhar Krishnamurthy | 2018-08-07 |