Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10068048 | Generating clock trees for a circuit design | Mehrdad Eslami Dehkordi, Sridhar Krishnamurthy, Frank Mueller | 2018-09-04 |
| 10042971 | Placement and routing of clock signals for a circuit design | Mehrdad Eslami Dehkordi, Raoul Badaoui, Sridhar Krishnamurthy | 2018-08-07 |
| 9529957 | Multithreaded scheduling for placement of circuit designs using connectivity and utilization dependencies | Grigor S. Gasparyan, Xiao Dong | 2016-12-27 |
| 9330220 | Clock region partitioning and clock routing | Mehrdad Eslami Dehkordi, Sridhar Krishnamurthy, Abhishek Joshi | 2016-05-03 |
| 8418115 | Routability based placement for multi-die integrated circuits | Rajat Aggarwal, Srinivasan Dasasathyan | 2013-04-09 |
| 8225262 | Method of and system for placing clock circuits in an integrated circuit | Wei Mark Fang, Srinivasan Dasasathyan | 2012-07-17 |
| 8091060 | Clock domain partitioning of programmable integrated circuits | Srinivasan Dasasathyan | 2012-01-03 |