Rochit Rajsuman — 29 Patents at Advantest

Rochit Rajsuman has been granted 29 US patents while listed as an inventor at Advantest. The first was granted in 1994 and the most recent in March 2007. Rochit Rajsuman ranks #127,851 of 4,157,543 US inventors in our database (top 3.1%). Patent records list Rochit Rajsuman in Richmond Heights, OH, US.

Issued Patents All Time

Showing 1–25 of 29 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7194668	Event based test method for debugging timing related failures in integrated circuits	Ankan Pramanick, Siddharth Sawe	2007-03-20	$58,000
7178115	Manufacturing method and apparatus to avoid prototype-hold in ASIC/SOC manufacturing	Hiroaki Yamoto	2007-02-13	$158,000
7089135	Event based IC test system	Shigeru Sugamori, Robert Sauer, Hiroaki Yamoto, James Alan Turnquist, Bruce R. Parnas +1 more	2006-08-08	$181,000
7089517	Method for design validation of complex IC	Hiroaki Yamoto	2006-08-08	$181,000
6948105	Method of evaluating core based system-on-a-chip (SoC) and structure of SoC incorporating same	—	2005-09-20	$158,000
6944808	Method of evaluating core based system-on-a-chip	Hiroaki Yamoto	2005-09-13	$85,000
6915469	High speed vector access method from pattern memory for test systems	—	2005-07-05	$116,000
6804620	Calibration method for system performance validation of automatic test equipment	Douglas A. Larson, Anthony Le, Carol Qiao Tong	2004-10-12	$89,000
6791316	High speed semiconductor test system using radially arranged pin cards	Hiroaki Yamoto	2004-09-14	$149,000
6747447	Locking apparatus and loadboard assembly	Niels Markert, Anthony Le, Robert Sauer, Hiroki Yamoto	2004-06-08	$402,000
6678645	Method and apparatus for SoC design validation	Hiroaki Yamoto	2004-01-13	$100,000
6651204	Modular architecture for memory testing on event based test system	Shigeru Sugamori, Hiroaki Yamoto	2003-11-18	$235,000
6629282	Module based flexible semiconductor test system	Shigeru Sugamori	2003-09-30	$249,000
6594609	Scan vector support for event based test system	Anthony Le	2003-07-15	$113,000
6578169	Data failure memory compaction for semiconductor test system	Anthony Le, James Alan Turnquist, Shigeru Sugamori	2003-06-10	$145,000
6567941	Event based test system storing pin calibration data in non-volatile memory	James Alan Turnquist, Shigeru Sugamori	2003-05-20	$183,000
6532561	Event based semiconductor test system	James Alan Turnquist, Shigeru Sugamori, Hiroaki Yamoto	2003-03-11	$396,000
6408412	Method and structure for testing embedded analog/mixed-signal cores in system-on-a-chip	—	2002-06-18	$19,000
6404218	Multiple end of test signal for event based test system	Anthony Le, James Alan Turnquist, Shigeru Sugamori	2002-06-11	$46,000
6377065	Glitch detection for semiconductor test system	Anthony Le, James Alan Turnquist, Shigeru Sugamori	2002-04-23	$16,000
6249892	Circuit structure for testing microprocessors and test method thereof	Hiroaki Yamoto	2001-06-19
6249889	Method and structure for testing embedded memories	Hiroaki Yamoto	2001-06-19
6249893	Method and structure for testing embedded cores based system-on-a-chip	Hiroaki Yamoto	2001-06-19
6108805	Domino scan architecture and domino scan flip-flop for the testing of domino and hybrid CMOS circuits	—	2000-08-22	$25,281,000
5963566	Application specific integrated circuit chip and method of testing same	Ching-Yen Ho	1999-10-05	$12,478,000

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Rochit Rajsuman — 29 Patents

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