Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › High speed semiconductor test system using radially arranged pin cards

High speed semiconductor test system using radially arranged pin cards

US Patent 6791316 · Granted Sep 14, 2004

Estimated economic value: $149,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Test method, test system and assist board2009
Event based test method for debugging timing related failures in integrated circ2007
Manufacturing method and apparatus to avoid prototype-hold in ASIC/SOC manufactu2007
Manufacturing method and apparatus to avoid prototype-hold in ASIC/SOC manufactu2007
Event based IC test system2006
Event based IC test system2006
Method for design validation of complex IC2006
Method for design validation of complex IC2006
Method of evaluating core based system-on-a-chip (SoC) and structure of SoC inco2005
Method of evaluating core based system-on-a-chip2005
Method of evaluating core based system-on-a-chip2005
High speed vector access method from pattern memory for test systems2005