| 11201148 |
Architecture for monolithic 3D integration of semiconductor devices |
Lars Liebmann, Anton J. deVilliers |
2021-12-14 |
| 11177250 |
Method for fabrication of high density logic and memory for advanced circuit architecture |
Mark I. Gardner, H. Jim Fulford, Lars Liebmann, Daniel Chanemougame |
2021-11-16 |
| 11164781 |
ALD (atomic layer deposition) liner for via profile control and related applications |
Xinghua Sun, Yen-Tien Lu, Angelique Raley, David L. O'Meara |
2021-11-02 |
| 11161532 |
Monitoring system, wayside LED signal, and method for monitoring a wayside LED signal |
David Cowen |
2021-11-02 |
| 11114346 |
High density logic formation using multi-dimensional laser annealing |
H. Jim Fulford, Mark I. Gardner, Lars Liebmann, Daniel Chanemougame |
2021-09-07 |
| 11114381 |
Power distribution network for 3D logic and memory |
Lars Liebmann, Anton J. deVilliers, Kandabara Tapily |
2021-09-07 |
| 11107733 |
Multi-dimensional planes of logic and memory formation using single crystal silicon orientations |
Mark I. Gardner, H. Jim Fulford, Lars Liebmann, Daniel Chanemougame |
2021-08-31 |
| 11101173 |
Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same |
Robert D. Clark, Kandabara Tapily, Angelique Raley, Qiang Zhao |
2021-08-24 |
| 11031287 |
Fully self-aligned via with selective bilayer dielectric regrowth |
Kandabara Tapily |
2021-06-08 |
| 10991626 |
Method for controlling transistor delay of nanowire or nanosheet transistor devices |
Subhadeep Kal, Anton J. deVilliers |
2021-04-27 |
| 10964706 |
Three-dimensional semiconductor device including integrated circuit, transistors and transistor components and method of fabrication |
Anton J. deVilliers |
2021-03-30 |
| 10930764 |
Extension region for a semiconductor device |
Kandabara Tapily, Nihar Mohanty, Anton J. deVilliers |
2021-02-23 |
| 10923392 |
Interconnect structure and method of forming the same |
Soo Doo Chae, Gerrit J. Leusink, Robert D. Clark, Kai-Hung Yu |
2021-02-16 |
| 10916472 |
Self-aware and correcting heterogenous platform incorporating integrated semiconductor processing modules and method for using same |
Robert D. Clark, Kandabara Tapily, Angelique Raley, Qiang Zhao |
2021-02-09 |
| 10916637 |
Method of forming gate spacer for nanowire FET device |
Anton J. deVilliers |
2021-02-09 |