Issued Patents 2021
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11201152 | Method, apparatus, and system for fin-over-nanosheet complementary field-effect-transistor | Ruilong Xie, Steven R. Soss, Steven Bentley, Daniel Chanemougame, Julien Frougier +1 more | 2021-12-14 |
| 11201148 | Architecture for monolithic 3D integration of semiconductor devices | Jeffrey Smith, Anton J. deVilliers | 2021-12-14 |
| 11177250 | Method for fabrication of high density logic and memory for advanced circuit architecture | Mark I. Gardner, H. Jim Fulford, Jeffrey Smith, Daniel Chanemougame | 2021-11-16 |
| 11114346 | High density logic formation using multi-dimensional laser annealing | H. Jim Fulford, Mark I. Gardner, Jeffrey Smith, Daniel Chanemougame | 2021-09-07 |
| 11114381 | Power distribution network for 3D logic and memory | Jeffrey Smith, Anton J. deVilliers, Kandabara Tapily | 2021-09-07 |
| 11107733 | Multi-dimensional planes of logic and memory formation using single crystal silicon orientations | Mark I. Gardner, H. Jim Fulford, Jeffrey Smith, Daniel Chanemougame | 2021-08-31 |
| 11043418 | Middle of the line self-aligned direct pattern contacts | Jason E. Stephens, Daniel Chanemougame, Ruilong Xie, Gregory A. Northrop | 2021-06-22 |
| 10978388 | Skip via for metal interconnects | Hari Prasad Amanapu, Prasad Bhosale, Nicholas V. LiCausi, James Jay McMahon, Cornelius Brown Peethala +1 more | 2021-04-13 |
| 10916478 | Methods of performing fin cut etch processes for FinFET semiconductor devices | Lei Zhuang, Balasubramanian Pranatharthiharan, Ruilong Xie, Terence B. Hook | 2021-02-09 |