Issued Patents 2020
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10867949 | Substrate design for semiconductor packages and method of forming same | Jung Wei Cheng, Mirng-Ji Lii, Chien-Hsun Lee, Chen-Hua Yu | 2020-12-15 |
| 10867878 | Dam for three-dimensional integrated circuit | An-Jhih Su, Chien Ling Hwang, Jung Wei Cheng, Hsin-Yu Pan, Chen-Hua Yu | 2020-12-15 |
| 10825798 | Packages with stacked dies and methods of forming the same | Chien-Hsun Lee, Mirng-Ji Lii, Chen-Hua Yu | 2020-11-03 |
| 10804242 | Methods of forming multi-die package structures including redistribution layers | Chen-Hua Yu, Kuo-Chung Yee, Chien-Hsun Lee | 2020-10-13 |
| 10777431 | Post-passivation interconnect structure and method of forming the same | Hung-Jen Lin, Chien-Hsiun Lee | 2020-09-15 |
| 10714359 | Substrate design for semiconductor packages and method of forming same | Jung Wei Cheng, Mirng-Ji Lii, Chien-Hsun Lee, Chen-Hua Yu | 2020-07-14 |
| 10665565 | Package assembly | Hung-Jen Lin, Chien-Hsiun Lee, Wen-Hsiung Lu, Ming-Da Cheng, Chung-Shi Liu | 2020-05-26 |
| 10651055 | Post-passivation interconnect structure and method of forming the same | Hung-Jen Lin, Chien-Hsun Lee | 2020-05-12 |