Issued Patents 2020
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10854733 | Composite spacer enabling uniform doping in recessed fin devices | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2020-12-01 |
| 10784365 | Fin field effect transistor fabrication and devices having inverted T-shaped gate | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2020-09-22 |
| 10693007 | Wrapped contacts with enhanced area | Kangguo Cheng, Heng Wu, Peng Xu | 2020-06-23 |
| 10685961 | Contact formation in semiconductor devices | Oleg Gluschenkov, Hiroaki Niimi, Joseph S. Washington, Tenko Yamashita | 2020-06-16 |
| 10658387 | Extremely thin silicon-on-insulator silicon germanium device without edge strain relaxation | Kangguo Cheng, Juntao Li, Xin Miao | 2020-05-19 |
| 10629709 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2020-04-21 |
| 10622257 | VFET device design for top contact resistance measurement | Chen Zhang | 2020-04-14 |
| 10586769 | Contact formation in semiconductor devices | Oleg Gluschenkov, Jiseok Kim, Shogo Mochizuki, Hiroaki Niimi | 2020-03-10 |
| 10573567 | Sacrificial cap for forming semiconductor contact | Praneet Adusumilli, Shogo Mochizuki, Jie Yang, Chun Wing Yeung | 2020-02-25 |
| 10566246 | Shared contact trench comprising dual silicide layers and dual epitaxial layers for source/drain layers of NFET and PFET devices | Heng Wu, Kangguo Cheng, Junli Wang | 2020-02-18 |
| 10559491 | Fabrication of vertical transport fin field effect transistors with a self-aligned separator and an isolation region with an air gap | Kangguo Cheng, Sebastian Naczas, Heng Wu, Peng Xu | 2020-02-11 |
| 10546776 | Dual silicide liner flow for enabling low contact resistance | Praneet Adusumilli, Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2020-01-28 |