Issued Patents 2019
Showing 51–75 of 137 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10347752 | Semiconductor structures having increased channel strain using fin release in gate regions | Kangguo Cheng, Bruce B. Doris, Ali Khakifirooz, Darsen D. Lu, Kern Rim | 2019-07-09 |
| 10347628 | Simultaneously fabricating a high voltage transistor and a FinFET | Kangguo Cheng, Ali Khakifirooz, Charan V. Surisetty | 2019-07-09 |
| 10340221 | Stacked FinFET anti-fuse | Oscar van der Straten, Praneet Adusumilli, Keith E. Fogel | 2019-07-02 |
| 10332972 | Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface | Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning | 2019-06-25 |
| 10332809 | Method and structure to introduce strain in stack nanosheet field effect transistor | Takashi Ando, Jingyun Zhang, Choonghyun Lee, Pouya Hashemi | 2019-06-25 |
| 10319817 | Lattice matched epitaxial oxide layer for a super steep retrograde well | — | 2019-06-11 |
| 10319836 | Effective junction formation in vertical transistor structures by engineered bottom source/drain epitaxy | Shogo Mochizuki | 2019-06-11 |
| 10319833 | Vertical transport field-effect transistor including air-gap top spacer | Hemanth Jagannathan, Choonghyun Lee, Christopher J. Waskiewicz | 2019-06-11 |
| 10319645 | Method for forming a semiconductor structure containing high mobility semiconductor channel materials | Kangguo Cheng, Pouya Hashemi, Ali Khakifirooz | 2019-06-11 |
| 10312151 | Monolithic co-integration of MOSFET and JFET for neuromorphic/cognitive circuit applications | Karthik Balakrishnan, Bahman Hekmatshoartabari, Jeng-Bang Yau | 2019-06-04 |
| 10312438 | Resistive memory with amorphous silicon filaments | Bahman Hekmatshoartabari | 2019-06-04 |
| 10312337 | Fabrication of nano-sheet transistors with different threshold voltages | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2019-06-04 |
| 10312259 | Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same | Bruce B. Doris, Lisa F. Edge, Pouya Hashemi | 2019-06-04 |
| 10312234 | Diode connected vertical transistor | Karthik Balakrishnan, Pouya Hashemi | 2019-06-04 |
| 10312097 | Salicide bottom contacts | Praneet Adusumilli, Oscar van der Straten | 2019-06-04 |
| 10304823 | Vertical field effect transistor (VFET) programmable complementary metal oxide semiconductor inverter | Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning | 2019-05-28 |
| 10304773 | Low resistance contact structures including a copper fill for trench structures | Praneet Adusumilli, Oscar van der Straten, Chih-Chao Yang | 2019-05-28 |
| 10304831 | Single source/drain epitaxy for co-integrating nFET semiconductor fins and pFET semiconductor fins | Hemanth Jagannathan | 2019-05-28 |
| 10304841 | Metal FinFET anti-fuse | Praneet Adusumilli, Oscar van der Straten, Miaomiao Wang, Chih-Chao Yang | 2019-05-28 |
| 10304844 | Stacked FinFET EEPROM | Karthik Balakrishnan, Pouya Hashemi, Tak H. Ning | 2019-05-28 |
| 10297686 | Tapered vertical FET having III-V channel | Karthik Balakrishnan, Kangguo Cheng, Pouya Hashemi | 2019-05-21 |
| 10297614 | Gate top spacer for FinFET | Veeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki | 2019-05-21 |
| 10297512 | Method of making thin SRAM cell having vertical transistors | Karthik Balakrishnan, Michael A. Guillorn, Pouya Hashemi | 2019-05-21 |
| 10290747 | MIS capacitor for finned semiconductor structure | Keith E. Fogel, Pouya Hashemi, Shogo Mochizuki | 2019-05-14 |
| 10283516 | Stacked nanosheet field effect transistor floating-gate EEPROM cell and array | Karthik Balakrishnan, Jeng-Bang Yau, Tak H. Ning | 2019-05-07 |