Issued Patents 2018
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10153340 | Stacked nanowire semiconductor device | William L. Nicoll, Hanfei Wang | 2018-12-11 |
| 10134905 | Semiconductor device including wrap around contact, and method of forming the semiconductor device | Nicolas Loubet | 2018-11-20 |
| 10128347 | Gate-all-around field effect transistor having multiple threshold voltages | Ruqiang Bao, Terence B. Hook, Robert R. Robison, Reinaldo Vega, Tenko Yamashita | 2018-11-13 |
| 10121855 | Stacked nanowire semiconductor device | William L. Nicoll, Hanfei Wang | 2018-11-06 |
| 10114921 | Method and recording medium of reducing chemoepitaxy directed self-assembled defects | Kafai Lai, Chi-Chun Liu, Ananthan Raghunathan, HsinYu Tsai | 2018-10-30 |
| 10096607 | Three-dimensional stacked junctionless channels for dense SRAM | Robert R. Robison, Reinaldo Vega, Rajasekhar Venigalla | 2018-10-09 |
| 10096673 | Nanowire with sacrificial top wire | Josephine B. Chang, Bruce B. Doris, Isaac Lauer, Xin Miao | 2018-10-09 |
| 10081740 | Directed self-assembly | Joy Cheng, Chi-Chun Liu, Jed W. Pitera, HsinYu Tsai | 2018-09-25 |
| 10074575 | Integrating and isolating nFET and pFET nanosheet transistors on a substrate | Nicolas Loubet, Muthumanickam Sankarapandian | 2018-09-11 |
| 10068850 | Trench silicide with self-aligned contact vias | Josephine B. Chang, Fei Liu, Adam M. Pyzyna | 2018-09-04 |
| 10059820 | Hybrid topographical and chemical pre-patterns for directed self-assembly of block copolymers | Markus Brink, Joy Cheng, Alexander Friz, Chi-Chun Liu, Daniel P. Sanders +3 more | 2018-08-28 |
| 10056293 | Techniques for creating a local interconnect using a SOI wafer | Josephine B. Chang, Isaac Lauer, Jeffrey W. Sleight | 2018-08-21 |
| 10037398 | Pattern decomposition method for wiring patterns with chemoepitaxy based directed self assembly | Markus Brink, Joy Cheng, Gregory S. Doerk, Kafai Lai, HsinYu Tsai | 2018-07-31 |
| 10037885 | Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer | Bruce B. Doris, Isaac Lauer, Xin Miao | 2018-07-31 |
| 10026810 | Co-integration of silicon and silicon-germanium channels for nanosheet devices | Isaac Lauer, Nicolas Loubet | 2018-07-17 |
| 10014214 | Electronic device including moat power metallization in trench | Josephine B. Chang, Leland Chang, Chung-Hsun Lin, Adam M. Pyzyna | 2018-07-03 |
| 9997613 | Integrated etch stop for capped gate and method for manufacturing the same | Josephine B. Chang, Bruce B. Doris, Isaac Lauer, Xin Miao | 2018-06-12 |
| 9997519 | Dual channel structures with multiple threshold voltages | Ruqiang Bao, Vijay Narayanan | 2018-06-12 |
| 9954062 | Stacked planar double-gate lamellar field-effect transistor | Josephine B. Chang, Gen P. Lauer, Isaac Lauer, Jeffrey W. Sleight | 2018-04-24 |
| 9954063 | Stacked planar double-gate lamellar field-effect transistor | Josephine B. Chang, Gen P. Lauer, Isaac Lauer, Jeffrey W. Sleight | 2018-04-24 |
| 9941129 | Semiconductor device having self-aligned gate contacts | Josephine B. Chang, Paul Chang | 2018-04-10 |
| 9929334 | Josephson junction with spacer | Josephine B. Chang, Ryan M. Martin, Jeffrey W. Sleight | 2018-03-27 |
| 9911592 | Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure | Bruce B. Doris, Isaac Lauer, Xin Miao | 2018-03-06 |
| 9911603 | Pattern decomposition for directed self assembly patterns templated by sidewall image transfer | Joy Cheng, Chi-Chun Liu, HsinYu Tsai | 2018-03-06 |
| 9884978 | Directed self-assembly | Joy Cheng, Chi-Chun Liu, Jed W. Pitera, HsinYu Tsai | 2018-02-06 |