Issued Patents 2018
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9954058 | Self-aligned air gap spacer for nanosheet CMOS devices | Alexander Reznicek, Joshua M. Rubin, Junli Wang | 2018-04-24 |
| 9954103 | Bottom spacer formation for vertical transistor | Oleg Gluschenkov, Sanjay C. Mehta, Alexander Reznicek | 2018-04-24 |
| 9954102 | Vertical field effect transistor with abrupt extensions at a bottom source/drain structure | Alexander Reznicek | 2018-04-24 |
| 9947532 | Forming zig-zag trench structure to prevent aspect ratio trapping defect escape | Judson R. Holt, Alexander Reznicek, Melissa A. Smith | 2018-04-17 |
| 9947748 | Dielectric isolated SiGe fin on bulk substrate | Huiming Bu, Tenko Yamashita | 2018-04-17 |
| 9947689 | Semiconductor device structure with 110-PFET and 111-NFET current flow direction | Pouya Hashemi, Ali Khakifirooz, Alexander Reznicek | 2018-04-17 |
| 9941175 | Dielectric isolated SiGe fin on bulk substrate | Huiming Bu, Tenko Yamashita | 2018-04-10 |
| 9941391 | Method of forming vertical transistor having dual bottom spacers | Oleg Gluschenkov, Sanjay C. Mehta, Alexander Reznicek | 2018-04-10 |
| 9941302 | Structure and method to form defect free high-mobility semiconductor fins on insulator | Veeraraghavan S. Basker, Oleg Gluschenkov, Alexander Reznicek | 2018-04-10 |
| 9923084 | Forming a fin using double trench epitaxy | Veeraraghavan S. Basker, Pouya Hashemi, Alexander Reznicek | 2018-03-20 |
| 9917060 | Forming a contact for a semiconductor device | Oleg Gluschenkov, Zuoguang Liu, Hiroaki Niimi, Ruilong Xie | 2018-03-13 |
| 9911849 | Transistor and method of forming same | Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov, Alexander Reznicek | 2018-03-06 |
| 9905692 | SOI FinFET fins with recessed fins and epitaxy in source drain region | Alexander Reznicek, Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov | 2018-02-27 |
| 9892925 | Overhang hardmask to prevent parasitic epitaxial nodules at gate end during source drain epitaxy | Kangguo Cheng, Pouya Hashemi, Alexander Reznicek | 2018-02-13 |
| 9893014 | Designable channel FinFET fuse | Keith E. Fogel, Pouya Hashemi, Alexander Reznicek | 2018-02-13 |
| 9865730 | VTFET devices utilizing low temperature selective epitaxy | Hemanth Jagannathan | 2018-01-09 |
| 9859216 | Voidless contact metal structures | Veeraraghavan S. Basker, Nicolas L. Breil, Oleg Gluschenkov, Alexander Reznicek | 2018-01-02 |