Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
GD

Gilbert Dewey — 17 Patents in 2016

Intel: 17 patents #35 of 5,207Top 1%
Beaverton, OR: #5 of 468 inventorsTop 2%
Oregon: #27 of 4,070 inventorsTop 1%
Overall (2016): #2,175 of 481,213Top 1%
17 Patents 2016

Issued Patents 2016

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9478635 Germanium-based quantum well devices Ravi Pillarisetty, Been-Yih Jin, Benjamin Chu-Kung, Matthew V. Metz, Jack T. Kavalieros +5 more 2016-10-25 $11,658,000
9461160 Non-planar III-N transistor Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Jack T. Kavalieros, Matthew V. Metz +3 more 2016-10-04 $11,494,000
9461141 Contact techniques and configurations for reducing parasitic resistance in nanowire transistors Ravi Pillarisetty, Benjamin Chu-Kung, Willy Rachmady, Van H. Le, Niloy Mukherjee +3 more 2016-10-04 $11,494,000
9455150 Conformal thin film deposition of electropositive metal alloy films Scott B. Clendenning, Patricio E. Romero 2016-09-27 $16,083,000
9443936 Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains Prashant Majhi, Mantu K. Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic +2 more 2016-09-13 $11,798,000
9437706 Method of fabricating metal-insulator-semiconductor tunneling contacts using conformal deposition and thermal growth processes Niloy Mukherjee, Matthew V. Metz, Jack T. Kavalieros, Robert S. Chau 2016-09-06 $9,244,000
9412872 N-type and P-type tunneling field effect transistors (TFETs) Roza Kotlyar, Stephen M. Cea, Benjamin Chu-Kung, Uygar E. Avci, Rafael Rios +4 more 2016-08-09 $12,367,000
9397188 Group III-N nanowire transistors Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Jack T. Kavalieros, Matthew V. Metz +3 more 2016-07-19 $7,217,000
9391181 Lattice mismatched hetero-epitaxial film Benjamin Chu-Kung, Van H. Le, Robert S. Chau, Sansaptak Dasgupta, Niti Goel +8 more 2016-07-12 $10,128,000
9343574 Non-planar semiconductor device having group III-V material active region with multi-dielectric gate stack Marko Radosavljevic, Ravi Pillarisetty, Benjamin Chu-Kung, Niloy Mukherjee 2016-05-17 $8,600,000
9337291 Deep gate-all-around semiconductor device having germanium or group III-V active layer Ravi Pillarisetty, Willy Rachmady, Van H. Le, Seung Hoon Sung, Jessica S. Kachian +5 more 2016-05-10 $12,181,000
9287380 Gate electrode having a capping layer Mark L. Doczy, Suman Datta, Justin K. Brask, Matthew V. Metz 2016-03-15 $12,478,000
9263557 Techniques for forming non-planar germanium quantum well devices Ravi Pillarisetty, Jack T. Kavalieros, Willy Rachmady, Uday Shah, Benjamin Chu-Kung +4 more 2016-02-16 $10,295,000
9257346 Apparatus and methods for forming a modulation doped non-planar transistor Ravi Pillarisetty, Mantu K. Hudait, Marko Radosavljevic, Willy Rachmady, Jack T. Kavalieros 2016-02-09 $15,927,000
9245989 High voltage field effect transistors Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Jack T. Kavalieros, Matthew V. Metz +3 more 2016-01-26 $9,792,000
9240410 Group III-N nanowire transistors Han Wui Then, Robert S. Chau, Benjamin Chu-Kung, Jack T. Kavalieros, Matthew V. Metz +3 more 2016-01-19 $21,016,000
9236476 Techniques and configuration for stacking transistors of an integrated circuit device Ravi Pillarisetty, Charles C. Kuo, Han Wui Then, Willy Rachmady, Van H. Le +3 more 2016-01-12 $15,498,000