Issued Patents 2011
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8071442 | Transistor with embedded Si/Ge material having reduced offset to the channel region | Stephan Kronholz, Markus Lenski, Andreas Ott | 2011-12-06 |
| 8062952 | Strain transformation in biaxially strained SOI substrates for performance enhancement of P-channel and N-channel transistors | Jan Hoentschel, Stefan Flachowsky | 2011-11-22 |
| 8053273 | Shallow PN junction formed by in situ doping during selective growth of an embedded semiconductor alloy by a cyclic growth/etch deposition process | Thorsten Kammler, Ina Ostermay | 2011-11-08 |
| 8039878 | Transistor having a channel with tensile strain and oriented along a crystallographic orientation with increased charge carrier mobility | Igor Peidous, Thorsten Kammler | 2011-10-18 |
| 8039342 | Enhanced integrity of a high-K metal gate electrode structure by using a sacrificial spacer for cap removal | Uwe Griebenow, Jan Hoentschel, Thilo Scheiper | 2011-10-18 |
| 8030148 | Structured strained substrate for forming strained transistors with reduced thickness of active layer | Jan Hoentschel, Sven Beyer | 2011-10-04 |
| 8026134 | Recessed drain and source areas in combination with advanced silicide formation in transistors | Uwe Griebenow, Jan Hoentschel, Thilo Scheiper | 2011-09-27 |
| 8021942 | Method of forming CMOS device having gate insulation layers of different type and thickness | Andrew Waite, Martin Trentzsch, Johannes Groschopf, Gunter Grasshoff, Andreas Ott | 2011-09-20 |
| 7999326 | Tensile strain source using silicon/germanium in globally strained silicon | Karla Romero, Manfred Horstmann | 2011-08-16 |
| 7977180 | Methods for fabricating stressed MOS devices | Andrew Waite | 2011-07-12 |
| 7943442 | SOI device having a substrate diode with process tolerant configuration and method of forming the SOI device | Andreas Gehring, Jan Hoentschel | 2011-05-17 |
| 7939399 | Semiconductor device having a strained semiconductor alloy concentration profile | Anthony Mowry, Bernhard Trui, Maciej Wiatr, Andreas Gehring | 2011-05-10 |
| 7906383 | Stress transfer in an interlayer dielectric by providing a stressed dielectric layer above a stress-neutral dielectric material in a semiconductor device | Ralf Richter, Manfred Horstmann, Joerg Hohage | 2011-03-15 |
| 7897451 | Method for creating tensile strain by selectively applying stress memorization techniques to NMOS transistors | Maciej Wiatr, Casey Scott, Andreas Gehring, Peter Javorka | 2011-03-01 |
| 7879667 | Blocking pre-amorphization of a gate electrode of a transistor | Anthony Mowry, Markus Lenski, Roman Boschke | 2011-02-01 |
| 7863171 | SOI transistor having a reduced body potential and a method of forming the same | Jan Hoentschel, Joe Bloomquist, Manfred Horstmann | 2011-01-04 |