Issued Patents 2005
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6979625 | Copper interconnects with metal capping layer and selective copper alloys | Connie P. Wang, Darrell M. Erb | 2005-12-27 |
| 6952052 | Cu interconnects with composite barrier layers for wafer-to-wafer uniformity | Amit P. Marathe, Connie P. Wang | 2005-10-04 |
| 6939793 | Dual damascene integration scheme for preventing copper contamination of dielectric layer | Lu You, Fei Wang | 2005-09-06 |
| 6939803 | Method for forming conductor reservoir volume for integrated circuit interconnects | Amit P. Marathe, Pin-Chin Connie Wang | 2005-09-06 |
| 6893910 | One step deposition method for high-k dielectric and metal gate electrode | Paul R. Besser, Minh Van Ngo, James Pan, Jinsong Yin | 2005-05-17 |
| 6861350 | Method of manufacturing semiconductor device comprising silicon-rich tasin metal gate electrode | Minh Van Ngo, Jinsong Yin, James Pan, Paul R. Besser | 2005-03-01 |