Issued Patents 2002
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6500743 | Method of copper-polysilicon T-gate formation | Sergey Lopatin, Steven C. Avanzino | 2002-12-31 |
| 6495887 | Argon implantation after silicidation for improved floating-body effects | Srinath Krishnan, Witold P. Maszara | 2002-12-17 |
| 6492249 | High-K gate dielectric process with process with self aligned damascene contact to damascene gate and a low-k inter level dielectric | Qi Xiang, Ming-Ren Lin | 2002-12-10 |
| 6492209 | Selectively thin silicon film for creating fully and partially depleted SOI on same wafer | Srinath Krishnan, Witold P. Maszara | 2002-12-10 |
| 6492258 | METHOD FOR REDUCING STRESS-INDUCED VOIDS FOR 0.25-&mgr;M AND SMALLER SEMICONDUCTOR CHIP TECHNOLOGY BY ANNEALING INTERCONNECT LINES AND USING LOW BIAS VOLTAGE AND LOW INTERLAYER DIELECTRIC DEPOSITION RATE AND SEMICONDUCTOR CHIP MADE THEREBY | Minh Van Ngo, Paul R. Besser, John Caffall, Nick Maccrae, Richard J. Huang +1 more | 2002-12-10 |
| 6486062 | Selective deposition of amorphous silicon for formation of nickel silicide with smooth interface on N-doped substrate | George Jonathan Kluth | 2002-11-26 |
| 6475874 | Damascene NiSi metal gate high-k transistor | Qi Xiang, Paul R. Besser, John Foster, Paul L. King, Eric N. Paton | 2002-11-05 |
| 6465334 | Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors | Paul R. Besser, Paul L. King, Eric N. Paton, Qi Xiang | 2002-10-15 |
| 6465309 | Silicide gate transistors | Qi Xiang, Paul R. Besser, John Foster, Paul L. King, Eric N. Paton | 2002-10-15 |
| 6458679 | Method of making silicide stop layer in a damascene semiconductor structure | Eric N. Paton, Paul R. Besser, Qi Xiang, Paul L. King, John Foster | 2002-10-01 |
| 6452250 | Stacked integrated circuit and capacitor structure containing via structures | — | 2002-09-17 |
| 6440868 | Metal gate with CVD amorphous silicon layer and silicide for CMOS devices and method of making with a replacement gate process | Paul R. Besser, Qi Xiang | 2002-08-27 |
| 6440867 | Metal gate with PVD amorphous silicon and silicide for CMOS devices and method of making the same with a replacement gate process | Paul R. Besser, Qi Xiang | 2002-08-27 |
| 6436840 | Metal gate with CVD amorphous silicon layer and a barrier layer for CMOS devices and method of making with a replacement gate process | Paul R. Besser, Qi Xiang | 2002-08-20 |
| 6433379 | Tantalum anodization for in-laid copper metallization capacitor | Sergey Lopatin, Steven C. Avanzino, Qi Xiang | 2002-08-13 |
| 6417030 | Leaky lower interface for reduction of floating body effect in SOI devices | Donald L. Wollesen | 2002-07-09 |
| 6403492 | Method of manufacturing semiconductor devices with trench isolation | Darin A. Chan | 2002-06-11 |
| 6396108 | Self-aligned double gate silicon-on-insulator (SOI) device | Zoran Krivokapic | 2002-05-28 |
| 6392280 | Metal gate with PVD amorphous silicon layer for CMOS devices and method of making with a replacement gate process | Paul R. Besser, Qi Xiang | 2002-05-21 |
| 6380057 | Enhancement of nickel silicide formation by use of nickel pre-amorphizing implant | George Jonathan Kluth, Paul R. Besser, Paul L. King | 2002-04-30 |
| 6376343 | Reduction of metal silicide/silicon interface roughness by dopant implantation processing | Paul R. Besser, Qi Xiang | 2002-04-23 |
| 6376336 | Frontside SOI gettering with phosphorus doping | — | 2002-04-23 |
| 6368950 | Silicide gate transistors | Qi Xiang, Paul R. Besser, John Foster, Paul L. King, Eric N. Paton | 2002-04-09 |
| 6342414 | Damascene NiSi metal gate high-k transistor | Qi Xiang, Paul R. Besser, John Foster, Paul L. King, Eric N. Paton | 2002-01-29 |