Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6492249 | High-K gate dielectric process with process with self aligned damascene contact to damascene gate and a low-k inter level dielectric | Qi Xiang, Matthew S. Buynoski | 2002-12-10 |
| 6486038 | Method for and device having STI using partial etch trench bottom liner | Witold P. Maszara, Qi Xiang | 2002-11-26 |
| 6483147 | Through wafer backside contact to improve SOI heat dissipation | — | 2002-11-19 |
| 6458639 | MOS transistor with stepped gate insulator | Judy Xilin An, Bin Yu | 2002-10-01 |
| 6437404 | Semiconductor-on-insulator transistor with recessed source and drain | Qi Xiang, Wei Long | 2002-08-20 |
| 6420770 | STI (Shallow Trench Isolation) structures for minimizing leakage current through drain and source silicides | Qi Xiang, Wei Long | 2002-07-16 |
| 6380019 | Method of manufacturing a transistor with local insulator structure | Bin Yu, Shekhar Pramanick | 2002-04-30 |
| 6369429 | Low resistance composite contact structure utilizing a reaction barrier layer under a metal layer | Shekhar Pramanick, Qi Xiang | 2002-04-09 |
| 6362055 | Method of gate doping by ion implantation | Bin Yu | 2002-03-26 |
| 6342438 | Method of manufacturing a dual doped CMOS gate | Bin Yu | 2002-01-29 |