Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11930590 | Stress relief for flip-chip packaged devices | Tianyi Luo, Osvaldo Jorge Lopez, Jonathan Almeria Noquil, Bernardo Gallegos | 2024-03-12 |
| 11908780 | Semiconductor package with solder standoff | Jonathan Almeria Noquil, Lance Cole Wright, Osvaldo Jorge Lopez | 2024-02-20 |
| 11658130 | Conductive plate stress reduction feature | Tianyi Luo, Jonathan Almeria Noquil, Osvaldo Jorge Lopez, Lance Cole Wright | 2023-05-23 |
| 11557722 | Hall-effect sensor package with added current path | Ming Li, Yiqi Tang, Jie Chen, Enis Tuncer, Usman Mahmood Chaudhry +3 more | 2023-01-17 |
| 11495580 | Multi-chip module including stacked power devices with metal clip | Marie Denison, Richard J. Saye, Takahiko Kudoh | 2022-11-08 |
| 11177197 | Semiconductor package with solder standoff | Jonathan Almeria Noquil, Lance Cole Wright, Osvaldo Jorge Lopez | 2021-11-16 |
| 10892405 | Hall-effect sensor package with added current path | Ming Li, Yiqi Tang, Jie Chen, Enis Tuncer, Usman Mahmood Chaudhry +3 more | 2021-01-12 |
| 10128219 | Multi-chip module including stacked power devices with metal clip | Marie Denison, Richard J. Saye, Takahiko Kudoh | 2018-11-13 |
| 8436475 | IC device having low resistance TSV comprising ground connection | Rajiv Dunne, Gary P. Morrison, Masood Murtuza, Thomas D. Bonifield | 2013-05-07 |
| 8431481 | IC device having low resistance TSV comprising ground connection | Rajiv Dunne, Gary P. Morrison, Masood Murtuza, Thomas D. Bonifield | 2013-04-30 |
| 8193093 | Thru silicon enabled die stacking scheme | — | 2012-06-05 |
| 8178976 | IC device having low resistance TSV comprising ground connection | Rajiv Dunne, Gary P. Morrison, Masood Murtuza, Thomas D. Bonifield | 2012-05-15 |
| 8154134 | Packaged electronic devices with face-up die having TSV connection to leads and die pad | Thomas D. Bonifield, Gary P. Morrison, Rajiv Dunne, Masood Murtuza | 2012-04-10 |
| 8053873 | IC having voltage regulated integrated Faraday shield | Gregory E. Howard | 2011-11-08 |
| 8039309 | Systems and methods for post-circuitization assembly | Masood Murtuza, Donald C. Abbott | 2011-10-18 |
| 8017439 | Dual carrier for joining IC die or wafers to TSV wafers | Yoshimi Takahashi, Masood Murtuza, Rajiv Dunne | 2011-09-13 |
| 7973416 | Thru silicon enabled die stacking scheme | — | 2011-07-05 |
| 7915080 | Bonding IC die to TSV wafers | Yoshimi Takahashi, Masood Murtuza, Rajiv Dunne | 2011-03-29 |
| 7883936 | Multi layer low cost cavity substrate fabrication for PoP packages | Prema Palaniappan, Masood Murtuza | 2011-02-08 |
| 7790597 | Solder cap application process on copper bump using solder powder film | Rajiv Dunne, Gary P. Morrison, Masood Murtuza | 2010-09-07 |
| 7635914 | Multi layer low cost cavity substrate fabrication for pop packages | Prema Palaniappan, Masood Murtuza | 2009-12-22 |
| 7323405 | Fine pitch low cost flip chip substrate | Masood Murtuza | 2008-01-29 |
| 7057284 | Fine pitch low-cost flip chip substrate | Masood Murtuza | 2006-06-06 |
| 6888255 | Built-up bump pad structure and method for same | Masood Murtuza, Muthiah Venkateswaran | 2005-05-03 |
| 6849944 | Using a supporting structure to control collapse of a die towards a die pad during a reflow process for coupling the die to the die pad | Masood Murtuza, Muthiah Venkateswaran | 2005-02-01 |