Issued Patents All Time
Showing 51–75 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9559733 | Communication system and method of data communications | Feng-Wei Kuo, Chewn-Pu Jou, Huan-Neng Chen, Lan-Chou Cho | 2017-01-31 |
| 9543993 | Radio frequency interconnect | Lan-Chou Cho, Chewn-Pu Jou, Feng-Wei Kuo, Huan-Neng Chen | 2017-01-10 |
| 9431064 | Memory circuit and cache circuit configuration | Hsien-Hsin Sean Lee, Yun-Han Lee | 2016-08-30 |
| 9003338 | Common template for electronic article | Yun-Han Lee, Chin-Chou Liu, Hsien-Hsin Sean Lee, Chung-Sheng Yuan, Chao-Yang Yeh +2 more | 2015-04-07 |
| 8701073 | System and method for across-chip thermal and power management in stacked IC designs | Chung-Min Fu, Po-Hsiang Huang, Meng-Fu You, Chi-Yeh Yu | 2014-04-15 |
| 7640461 | On-chip circuit for transition delay fault test pattern generation with launch off shift | Thai M. Nguyen, David Vinke, Christopher Coleman | 2009-12-29 |
| 7490307 | Automatic generating of timing constraints for the validation/signoff of test structures | Giuseppe Fomaciari, Fabio Mazza, Cam Luong Lu | 2009-02-10 |
| 7444560 | Test clocking scheme | Thai M. Nguyen, Cam Luong Lu | 2008-10-28 |
| 7117408 | Method and system of testing data retention of memory | Charutosh Dixit | 2006-10-03 |
| 7061821 | Address wrap function for addressable memory devices | Paul W. Coteus, William Paul Hovis, Toshiaki Kirihata | 2006-06-13 |
| 7028248 | Multi-cycle symbol level error correction and memory system | Chin-Long Chen | 2006-04-11 |
| 6941414 | High speed embedded DRAM with SRAM-like interface | Louis L. Hsu, Li-Kong Wang | 2005-09-06 |
| 6888367 | Method and apparatus for testing integrated circuit core modules | Thai M. Nguyen, James Ngo | 2005-05-03 |
| 6674684 | Multi-bank chip compatible with a controller designed for a lesser number of banks and method of operating | — | 2004-01-06 |
| 6667929 | Power governor for dynamic RAM | Vesselina K. Zaharinova-Papazova, Henry Chin | 2003-12-23 |
| 6519736 | Generating special uncorrectable error codes for failure isolation | Chin-Long Chen, Mu-Yue Hsiao, Patrick J. Meaney | 2003-02-11 |
| 6480982 | Computer RAM memory system with enhanced scrubbing and sparing | Kenneth Y. Chan, Charles D. Holtz, Kevin W. Kark, Russell W. Lavallee | 2002-11-12 |
| 6463563 | Single symbol correction double symbol detection code employing a modular H-matrix | Chin-Long Chen, Mu-Yue Hsiao, Patrick J. Meaney | 2002-10-08 |
| 6460157 | Method system and program products for error correction code conversion | Chin-Long Chen, Mu-Yue Hsiao, Patrick J. Meaney | 2002-10-01 |
| 6457154 | Detecting address faults in an ECC-protected memory | Chin-Long Chen, Mu-Yue Hsiao, Patrick J. Meaney | 2002-09-24 |
| 6386456 | Memory card identification system | Chin-Long Chen, Charles D. Holtz, Giacomo Vincent Ingenio | 2002-05-14 |
| 6182174 | Memory card interface method using multiplexed storage protect key to indicate command acceptance | Kevin W. Kark, Russell W. Lavallee, Udo Wille, Hartmut Ulland, Walter Lipponer | 2001-01-30 |
| 6163857 | Computer system UE recovery logic | Patrick J. Meaney, Pak-kin Mak, Gary E. Strait | 2000-12-19 |
| 6052772 | Memory request protocol method | Kevin W. Kark, George C. Wellwood | 2000-04-18 |
| 6047361 | Memory control device, with a common synchronous interface coupled thereto, for accessing asynchronous memory devices and different synchronous devices | Giacomo Vincent Ingenio, Russell W. Lavallee | 2000-04-04 |