Issued Patents All Time
Showing 26–50 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| D971011 | Clip | — | 2022-11-29 |
| 11449656 | Method of designing semiconductor device | Shao-Huan Wang, Sheng-Hsiung Chen, Chun-Chen Chen, Hung-Chih Ou | 2022-09-20 |
| 11429028 | Method of cutting conductive patterns | Chin-Hsiung Hsu, Huang-Yu Chen, Tsong-Hua Ou | 2022-08-30 |
| 11275886 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Chun-Yao Ku, Shao-Huan Wang, Hung-Chih Ou | 2022-03-15 |
| 11263378 | Multi-row standard cell design method in hybrid row height system | Hung-Chih Ou, Chun-Yao Ku | 2022-03-01 |
| 11261204 | Composition for substrate surface modification and method using the same | Chen-Han Huang | 2022-03-01 |
| 11261203 | Composition for substrate surface modification and method using the same | Chen-Han Huang | 2022-03-01 |
| 11256844 | Cell row arrangement in regions of integrated circuit layout | Chun-Yao Ku, Ming-Tao Yu | 2022-02-22 |
| 11088092 | Via rail solution for high power electromigration | Kam-Tou Sio, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young +3 more | 2021-08-10 |
| 11087061 | Method and system for improving propagation delay of conductive line | Hung-Chih Ou | 2021-08-10 |
| 11063005 | Via rail solution for high power electromigration | Kam-Tou Sio, Chih-Ming Lai, Chun-Kuang Chen, Chih-Liang Chen, Charles Chew-Yuen Young +3 more | 2021-07-13 |
| 11030383 | Integrated device and method of forming the same | Chun-Yao Ku, Ming-Tao Yu, Shao-Huan Wang, Jyun-Hao Chang | 2021-06-08 |
| 10990745 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Shao-Huan Wang, Chun-Yao Ku, Hung-Chih Ou | 2021-04-27 |
| 10977420 | Method of decomposing a layout for multiple-patterning lithography | Meng-Kai Hsu | 2021-04-13 |
| 10975105 | Composition for substrate surface modification and method using the same | Chen-Han Huang, Hsing-Ying Lin | 2021-04-13 |
| 10956650 | Systems and methods for improving design performance through placement of functional and spare cells by leveraging LDE effect | Chun-Yao Ku, Jyun-Hao Chang, Ming-Tao Yu | 2021-03-23 |
| 10943046 | Semiconductor apparatus including uncrowned and crowned cells and method of making | Prasenjit Ray, Lee-Chung Lu, Meng-Kai Hsu, Yuan-Te Hou | 2021-03-09 |
| 10872190 | Method and system for latch-up prevention | Po-Chia Lai, Kuo-Ji Chen, Wun-Jie Lin, Yu-Ti Su, Rabiul Islam +4 more | 2020-12-22 |
| 10861790 | Power strap structure for high performance and low current density | Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chi-Yeh Yu, Jiann-Tyng Tzeng +6 more | 2020-12-08 |
| 10831978 | Method of regulating integrated circuit timing and power consumption | Hung-Chih Ou | 2020-11-10 |
| 10817643 | Method of designing semiconductor device and system for implementing the method | Shao-Huan Wang, Sheng-Hsiung Chen, Chun-Chen Chen, Hung-Chih Ou | 2020-10-27 |
| 10678991 | Integrated device and method of forming the same | Chun-Yao Ku, Ming-Tao Yu, Shao-Huan Wang, Jyun-Hao Chang | 2020-06-09 |
| 10643017 | Rule checking for multiple patterning technology | Meng-Kai Hsu, Yuan-Te Hou | 2020-05-05 |
| 10515186 | Method of decomposing a layout for multiple-patterning lithography | Meng-Kai Hsu | 2019-12-24 |
| 10509322 | Method of cutting conductive patterns | Chin-Hsiung Hsu, Huang-Yu Chen, Tsong-Hua Ou | 2019-12-17 |