Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406124 | Variable tracks and non-default rule routing | Wen-Hao Chen | 2025-09-02 |
| 12400067 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Yao Ku, Shao-Huan Wang | 2025-08-26 |
| 12353819 | Semiconductor device for regulating integrated circuit timing and power consumption | Wen-Hao Chen | 2025-07-08 |
| 12299375 | Semiconductor process technology assessment | Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang | 2025-05-13 |
| 12254259 | Multi-row standard cell design method in hybrid row height system | Wen-Hao Chen, Chun-Yao Ku | 2025-03-18 |
| 12199609 | Multiple supply voltage tracks and standard cells | Wen-Hao Chen | 2025-01-14 |
| 12014131 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Yao Ku, Shao-Huan Wang | 2024-06-18 |
| 11942941 | Multiple supply voltage tracks and standard cells | Wen-Hao Chen | 2024-03-26 |
| 11934763 | Method of regulating integrated circuit timing and power consumption | Wen-Hao Chen | 2024-03-19 |
| 11928416 | Semiconductor process technology assessment | Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang | 2024-03-12 |
| 11727185 | System for designing semiconductor device | Shao-Huan Wang, Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Chen Chen | 2023-08-15 |
| 11681853 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Yao Ku, Shao-Huan Wang | 2023-06-20 |
| 11604915 | Semiconductor process technology assessment | Kuo-Fu Lee, Wen-Hao Chen, Keh-Jeng Chang, Hsiang-Ho Chang | 2023-03-14 |
| 11449656 | Method of designing semiconductor device | Shao-Huan Wang, Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Chen Chen | 2022-09-20 |
| 11275886 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Yao Ku, Shao-Huan Wang | 2022-03-15 |
| 11263378 | Multi-row standard cell design method in hybrid row height system | Wen-Hao Chen, Chun-Yao Ku | 2022-03-01 |
| 11087061 | Method and system for improving propagation delay of conductive line | Wen-Hao Chen | 2021-08-10 |
| 10990745 | Integrated circuit and method of forming same and a system | Sheng-Hsiung Chen, Shao-Huan Wang, Wen-Hao Chen, Chun-Yao Ku | 2021-04-27 |
| 10831978 | Method of regulating integrated circuit timing and power consumption | Wen-Hao Chen | 2020-11-10 |
| 10817643 | Method of designing semiconductor device and system for implementing the method | Shao-Huan Wang, Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Chen Chen | 2020-10-27 |
| 10360342 | Method, system, and storage medium for engineering change order scheme in circuit design | Chun-Yao Ku, Wen-Hao Chen | 2019-07-23 |
| 10289794 | Layout for semiconductor device including via pillar structure | Shao-Huan Wang, Sheng-Hsiung Chen, Wen-Hao Chen, Chun-Chen Chen | 2019-05-14 |
| 10157251 | Method and system for partitioning circuit cells | Chun-Chen Chen, Sheng-Hsiung Chen | 2018-12-18 |
| 9977857 | Method and circuit for via pillar optimization | Chun-Yao Ku, Shao-Huan Wang, Wen-Hao Chen, Ming-Tao Yu | 2018-05-22 |
| 9830416 | Method for analog circuit placement | I-Peng Wu, Yao-Wen Chang, Yu-Tsang Hsieh | 2017-11-28 |