Issued Patents All Time
Showing 76–100 of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9419003 | Semiconductor devices and methods of manufacture thereof | Jean-Pierre Colinge, Carlos H. Diaz | 2016-08-16 |
| 9397217 | Contact structure of non-planar semiconductor device | Hsiang-Jen Tseng, Ting-Wei Chang, Wei-Yu Chen, Kuo-Nan Yang, Ming-Hsiang Song | 2016-07-19 |
| 9385213 | Integrated circuits and manufacturing methods thereof | Chung-Cheng Wu, Ali Keshavarzi, Ka-Hing Fung, Jiann-Tyng Tzeng, Yen-Ming Chen +6 more | 2016-07-05 |
| 9356020 | Semiconductor arrangement | Jean-Pierre Colinge, Sang Hoo Dhong, Chung-Cheng Wu | 2016-05-31 |
| 9312260 | Integrated circuits and manufacturing methods thereof | Ali Keshavarzi, Helen Shu-Hui Chang, Hsiang-Jen Tseng, Shyue-Shyh Lin, Lee-Chung Lu +6 more | 2016-04-12 |
| 9293606 | Semiconductor device with seal ring with embedded decoupling capacitor | Kuo-Ji Chen, Wei Ma, Hsien-Wei Chen, Hao-Yi Tsai | 2016-03-22 |
| 9231106 | FinFET with an asymmetric source/drain structure and method of making same | Hsiang-Jen Tseng, Ting-Wei Chiang, Wei-Yu Chen, Kuo-Nan Yang, Ming-Hsiang Song | 2016-01-05 |
| 9209247 | Self-aligned wrapped-around structure | Jean-Pierre Colinge, Kuo-Cheng Ching, Carlos H. Diaz | 2015-12-08 |
| 9177924 | Vertical nanowire transistor for input/output structure | Jean-Pierre Colinge, Carlos H. Diaz | 2015-11-03 |
| 9117677 | Semiconductor integrated circuit having a resistor and method of forming the same | Wei Ma, Kuo-Ji Chen, Fang-Tsun Chu | 2015-08-25 |
| 8999805 | Semiconductor device with reduced gate length | Jean-Pierre Colinge, Kuo-Cheng Ching, Carlos H. Diaz | 2015-04-07 |
| 8631366 | Integrated circuit design using DFM-enhanced architecture | Yung-Chin Hou, Lee-Chung Lu, Li-Chun Tien, Yi-Kan Cheng, Chun-Hui Tai +1 more | 2014-01-14 |
| 8552785 | Pulse generator | Ming-Zhang Kuo, Jen-Hang Yang, Shang-Chih Hsieh, Chih-Chiang Chang, Osamu Takahashi +1 more | 2013-10-08 |
| 8473888 | Systems and methods of designing integrated circuits | Li-Chun Tien, Shyue-Shyh Lin, Mei-Hui Huang | 2013-06-25 |
| 8443306 | Planar compatible FDSOI design architecture | Sang Hoo Dhong, Jiann-Tyng Tzeng, Kushare Mangesh Babaji, Ramakrishnan Krishnan, Lee-Chung Lu | 2013-05-14 |
| 8362573 | Integrated circuits and manufacturing methods thereof | Chung-Cheng Wu, Ali Keshavarzi, Ka-Hing Fung, Jiann-Tyng Tzeng, Yen-Ming Chen +6 more | 2013-01-29 |
| 7940108 | Voltage level shifter | Guang-Cheng Wang | 2011-05-10 |
| 7932566 | Structure and system of mixing poly pitch cell design under default poly pitch design rules | Yung-Chin Hou, Li-Chun Tien, Lee-Chung Lu, Ping Li | 2011-04-26 |
| 7821039 | Layout architecture for improving circuit performance | Li-Chun Tien, Lee-Chung Lu, Yung-Chin Hou, Chun-Hui Tai, Sheng-Hsin Chen +1 more | 2010-10-26 |
| 7808051 | Standard cell without OD space effect in Y-direction | Yung-Chin Hou, Lee-Chung Lu, Li-Chun Tien, Ping Li, Chun-Hui Tai +1 more | 2010-10-05 |
| 6061759 | Hidden precharge pseudo cache DRAM | — | 2000-05-09 |
| 5406138 | Programmable interconnect architecture using fewer storage cells than switches | Adi Srinivasan | 1995-04-11 |
| 5400294 | Memory cell with user-selectable logic state on power-up | Adi Srinivasan | 1995-03-21 |
| 5367482 | High voltage random-access memory cell incorporation level shifter | Adi Srinivasan | 1994-11-22 |
| 5341267 | Structures for electrostatic discharge protection of electrical and other components | Ralph G. Whitten, Amr M. Mohsen, Alan Comer | 1994-08-23 |