Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9846755 | Method for cell placement in semiconductor layout and system thereof | Lee-Chung Lu, Cheng-Chung Lin, Li-Chun Tien, Sang Hoo Dhong, Ta-Pen Guo | 2017-12-19 |
| 9679915 | Integrated circuit with well and substrate contacts | Ho-Chieh Hsieh, Hui-Zhong Zhuang, Kuo-Feng TSENG, Lee-Chung Lu, Cheng-Chung Lin +1 more | 2017-06-13 |
| 9495495 | Scan cell assignment | Cheng-Chung Lin, Sang Hoo Dhong, Ho-Chieh Hsieh, Kuo-Feng TSENG | 2016-11-15 |
| 9378926 | Electron beam lithography methods including time division multiplex loading | Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong | 2016-06-28 |
| 9362899 | Clock regenerator | Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong | 2016-06-07 |
| 9286970 | Memory circuit for pre-charging and write driving | Cheng-Chung Lin, Ho-Chieh Hsieh, Kuo-Feng TSENG, Sang Hoo Dhong | 2016-03-15 |
| 9202662 | Charged particle lithography system with a long shape illumination beam | Jimmy Hsiao, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong | 2015-12-01 |
| 8941085 | Electron beam lithography systems and methods including time division multiplex loading | Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong | 2015-01-27 |
| 8631365 | Memory building blocks and memory design using automatic design tools | Subramani Kengeri, Chung-Cheng Chou, Bharath Upputuri, Hank Cheng, Pey-Huey Chen | 2014-01-14 |
| 8619463 | Adaptive write bit line and word line adjusting mechanism for memory | Hank Cheng, Chung-Cheng Chou | 2013-12-31 |
| 8560997 | Conditional cell placement | Ping-Lin Yang, Cheng-Chung Lin, Jimmy Hsiao, Jia-Rong Hsu | 2013-10-15 |
| 8552785 | Pulse generator | Jen-Hang Yang, Shang-Chih Hsieh, Chih-Chiang Chang, Osamu Takahashi, Ta-Pen Guo +1 more | 2013-10-08 |
| 8437215 | Memory with word-line segment access | Chiting Cheng, Hsiu-Feng Peng, Chung-Cheng Chou | 2013-05-07 |
| 8331132 | Adaptive write bit line and word line adjusting mechanism for memory | Hank Cheng, Chung-Cheng Chou | 2012-12-11 |
| 8185851 | Memory building blocks and memory design using automatic design tools | Subramani Kengeri, Chung-Cheng Chou, Bharath Upputuri, Hank Cheng, Pey-Huey Chen | 2012-05-22 |
| 8116149 | Circuit and method for small swing memory signals | Yi-Tzu Chen, Chia-Wei Su, Chung-Cheng Chou | 2012-02-14 |