Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12063039 | Register with data retention | Wei-Min Hsu | 2024-08-13 |
| 11606093 | Level converting enable latch | Wei-Min Hsu | 2023-03-14 |
| 11264974 | Processing circuit using delay element coupled between control terminal and connection terminal of input transistor for hold time violation immunity | — | 2022-03-01 |
| 10620915 | Full adder circuits with reduced delay | Ying Wei, Min-Hang Hsieh | 2020-04-14 |
| 10445453 | Cell layout utilizing boundary cell with mixed poly pitch within integrated circuit | — | 2019-10-15 |
| 10361686 | Scan output flip-flops | Min-Hang Hsieh, Wei-Min Hsu | 2019-07-23 |
| 10297587 | Integrated circuit | — | 2019-05-21 |
| 9786645 | Integrated circuit | — | 2017-10-10 |
| 9705484 | Delay cell in a standard cell library | Ying Wei | 2017-07-11 |
| 9536031 | Replacement method for scan cell of integrated circuit, skewable scan cell and integrated circuit | Jen-Yi Liao | 2017-01-03 |
| 9202696 | Method for designing antenna cell that prevents plasma induced gate dielectric damage in semiconductor integrated circuits | Chun-Fu Chen, Pin-Dai Sue, Hui-Zhong Zhuang | 2015-12-01 |
| 8872269 | Antenna cell design to prevent plasma induced gate dielectric damage in semiconductor integrated circuits | Chun-Fu Chen, Pin-Dai Sue, Hui-Zhong Zhuang | 2014-10-28 |
| 8552785 | Pulse generator | Ming-Zhang Kuo, Shang-Chih Hsieh, Chih-Chiang Chang, Osamu Takahashi, Ta-Pen Guo +1 more | 2013-10-08 |
| 8482314 | Method and apparatus for improved multiplexing using tri-state inverter | Chun-Fu Chen, Hui-Zhong Zhuang | 2013-07-09 |
| 7550820 | Reverse-biased PN diode decoupling capacitor | Hsien-Te Chen, Chun-Hui Tai | 2009-06-23 |
| 7496862 | Method for automatically modifying integrated circuit layout | Mi-Chang Chang, Su-Ya Lin, Li-Chun Tien | 2009-02-24 |