Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7496862 | Method for automatically modifying integrated circuit layout | Su-Ya Lin, Jen-Hang Yang, Li-Chun Tien | 2009-02-24 |
| 7321139 | Transistor layout for standard cell with optimized mechanical stress effect | Liang Han, Huan-Tsung Huang, Wen-Jya Liang, Li-Chun Tien | 2008-01-22 |
| 6973636 | Method of defining forbidden pitches for a lithography exposure tool | Jaw-Jung Shin, Chun-Kuang Chen, Tsai-Sheng Gau, Burn Jeng Lin, Li-Chun Tien +4 more | 2005-12-06 |
| 6813757 | Method for evaluating a mask pattern on a substrate | Thomas J. Aton | 2004-11-02 |
| 5744865 | Highly thermally conductive interconnect structure for intergrated circuits | Shin-Puu Jeng | 1998-04-28 |