Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8125028 | Semiconductor devices for high power application | Hung-Shern Tsai, Geeng-Lih Lin | 2012-02-28 |
| 7321139 | Transistor layout for standard cell with optimized mechanical stress effect | Mi-Chang Chang, Liang Han, Huan-Tsung Huang, Li-Chun Tien | 2008-01-22 |
| 6602749 | Capacitor under bitline (CUB) memory cell structure with reduced parasitic capacitance | Kuo-Chi Tu | 2003-08-05 |
| 6277709 | Method of forming shallow trench isolation structure | Yin-Pin Wang, Chung-Ju Lee, Jhy-Weei Hsia, Fu-Liang Yang, Yuh-Sheng Chern | 2001-08-21 |
| 6249018 | Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line | Ing-Ruey Liaw | 2001-06-19 |
| 5807782 | Method of manufacturing a stacked capacitor having a fin-shaped storage electrode on a dynamic random access memory cell | Chao-Ming Koh, Bin Liu | 1998-09-15 |
| 5780339 | Method for fabricating a semiconductor memory cell in a DRAM | Bin Liu, Yeh-Sen Lin | 1998-07-14 |