Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10644501 | Driving circuit | Shao-Chang Huang, Shi-Hsiang Lu | 2020-05-05 |
| 10177135 | Integrated circuit and electrostatic discharge protection circuit thereof | Shao-Chang Huang, Chun-Chien Tsai, Yeh-Ning Jou | 2019-01-08 |
| 9893516 | ESD protection circuits | Yeh-Ning Jou | 2018-02-13 |
| 9722097 | Semiconductor device and method for manufacturing the same | Karuna Nidhi, Federico Agustin Altolaguirre, Ming-Dou Ker | 2017-08-01 |
| 9633992 | Electrostatic discharge protection device | Yeh-Jen Huang, Yeh-Ning Jou | 2017-04-25 |
| 9443943 | Semiconductor device and fabrication method thereof | Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang | 2016-09-13 |
| 9437591 | Cross-domain electrostatic discharge protection device | Karuna Nidhi, Federico Agustin Altolaguirre, Ming-Dou Ker | 2016-09-06 |
| 8921202 | Semiconductor device and fabrication method thereof | Kwang-Ming Lin, Shang-Hui Tu, Jui-Chun Chang | 2014-12-30 |
| 8125028 | Semiconductor devices for high power application | Hung-Shern Tsai, Wen-Jya Liang | 2012-02-28 |
| 7755143 | Semiconductor device | Yeh-Ning Jou | 2010-07-13 |
| 7599160 | Electrostatic discharge protection circuits | Yeh-Ning Jou | 2009-10-06 |
| 7579658 | Devices without current crowding effect at the finger's ends | Ming-Dou Ker, Hsin-Chyh Hsu | 2009-08-25 |
| 7129546 | Electrostatic discharge protection device | Ming-Dou Ker, Kun-Hsien Lin | 2006-10-31 |
| 7098522 | High voltage device with ESD protection | Yeh-Ning Jou, Ming-Dou Ker | 2006-08-29 |
| 6665160 | Voltage control component for ESD protection and its relevant circuitry | Ming-Dou Ker | 2003-12-16 |
| 6621673 | Two-stage ESD protection circuit with a secondary ESD protection circuit having a quicker trigger-on rate | Ming-Dou Ker | 2003-09-16 |
| 6590264 | Hybrid diodes with excellent ESD protection capacity | Ming-Dou Ker, Che-Hao Chuang | 2003-07-08 |
| 6559508 | ESD protection device for open drain I/O pad in integrated circuits with merged layout structure | Ming-Dou Ker | 2003-05-06 |
| 6526545 | Method for generating wafer testing program | Shien-Wang Lo | 2003-02-25 |
| 6465848 | Low-voltage-triggered electrostatic discharge protection device and relevant circuitry | Ming-Dou Ker | 2002-10-15 |
| 6420774 | Low junction capacitance semiconductor structure and I/O buffer | Ming-Dou Ker | 2002-07-16 |
| 6392860 | Electrostatic discharge protection circuit with gate-modulated field-oxide device | Ming-Dou Ker | 2002-05-21 |
| 6355960 | ESD protection for open drain I/O pad in integrated circuit with parasitic field FET devices | Ming-Dou Ker | 2002-03-12 |
| 6316805 | Electrostatic discharge device with gate-controlled field oxide transistor | Ming-Dou Ker | 2001-11-13 |
| 6274911 | CMOS device with deep current path for ESD protection | Ming-Dou Ker | 2001-08-14 |