Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9880596 | Power management mechanism | Bharath Upputuri | 2018-01-30 |
| 8631365 | Memory building blocks and memory design using automatic design tools | Subramani Kengeri, Chung-Cheng Chou, Bharath Upputuri, Ming-Zhang Kuo, Pey-Huey Chen | 2014-01-14 |
| 8619463 | Adaptive write bit line and word line adjusting mechanism for memory | Ming-Zhang Kuo, Chung-Cheng Chou | 2013-12-31 |
| 8331132 | Adaptive write bit line and word line adjusting mechanism for memory | Ming-Zhang Kuo, Chung-Cheng Chou | 2012-12-11 |
| 8219843 | Power management mechanism | Bharath Upputuri | 2012-07-10 |
| 8185851 | Memory building blocks and memory design using automatic design tools | Subramani Kengeri, Chung-Cheng Chou, Bharath Upputuri, Ming-Zhang Kuo, Pey-Huey Chen | 2012-05-22 |
| 7663908 | Method for increasing retention time in DRAM | Chen-Hui Hsieh, Chung-Cheng Chou | 2010-02-16 |
| 7663953 | Method for high speed sensing for extra low voltage DRAM | Chen-Hui Hsieh, Chung-Cheng Chou | 2010-02-16 |
| 7599212 | Method and apparatus for high-efficiency operation of a dynamic random access memory | Chen-Hui Hsieh, Chung-Cheng Chou | 2009-10-06 |