Issued Patents All Time
Showing 26–50 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11411161 | Piezoelectric sensing system and piezoelectric sensing circuit | Chih-Hsiou Lin, Chung-Yuan Su, Chao-Ta Huang | 2022-08-09 |
| 11355454 | Package structure and manufacturing method thereof | Tsung-Fu Tsai, Szu-Wei Lu, Chen-Hsuan Tsai, I-Ting Huang | 2022-06-07 |
| 11282793 | Integrated fan-out structure with rugged interconnect | Szu-Wei Lu, Jing-Cheng Lin, Chen-Hua Yu | 2022-03-22 |
| 11205629 | Package structure and method of fabricating the same | Tsung-Fu Tsai, Szu-Wei Lu | 2021-12-21 |
| 11133289 | Semiconductor package and manufacturing method of semiconductor package having plurality of encapsulating materials | Tsung-Fu Tsai, Szu-Wei Lu, Ying-Ching Shih | 2021-09-28 |
| 11101145 | Semiconductor device with dummy micro bumps between stacking dies to improve flowability of underfill material | Tsung-Fu Tsai, Chen-Hsuan Tsai, Chung Chieh TING, Szu-Wei Lu | 2021-08-24 |
| 11101252 | Package-on-package structure and manufacturing method thereof | Chin-Fu Kao, Jing-Cheng Lin, Li-Hui Cheng, Szu-Wei Lu | 2021-08-24 |
| 11056436 | Integrated fan-out structure with rugged interconnect | Szu-Wei Lu, Jing-Cheng Lin, Chen-Hua Yu | 2021-07-06 |
| 11009551 | Device and method of analyzing transistor and non-transitory computer readable medium | — | 2021-05-18 |
| 10985140 | Structure and formation method of package structure with underfill | Chen-Hsuan Tsai, Tsung-Fu Tsai, Szu-Wei Lu | 2021-04-20 |
| 10923438 | Package structure and method for forming the same | Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Szu-Wei Lu | 2021-02-16 |
| 10867919 | Electronic device and manufacturing method thereof | Tsung-Fu Tsai, Hou-Ju Huang, Szu-Wei Lu, Hung-Wei Tsai | 2020-12-15 |
| 10861835 | Solution for reducing poor contact in InFO package | Jing-Cheng Lin, Chen-Hua Yu, Szu-Wei Lu, Shin-Puu Jeng | 2020-12-08 |
| 10825693 | Carrier warpage control for three dimensional integrated circuit (3DIC) stacking | Jing-Cheng Lin, Chen-Hua Yu | 2020-11-03 |
| 10627442 | Method for estimating resistances of a source contact and a drain contact of a MOS transistor | Kung-Ming Fan, Hung-Hsiang Xsiao | 2020-04-21 |
| 10566432 | Transistor device | Jhen-Yu Tsai | 2020-02-18 |
| 10461162 | Transistor device | Jhen-Yu Tsai | 2019-10-29 |
| 10438934 | Package-on-package structure and manufacturing method thereof | Chin-Fu Kao, Jing-Cheng Lin, Li-Hui Cheng, Szu-Wei Lu | 2019-10-08 |
| 10347612 | Solution for reducing poor contact in InFO package | Jing-Cheng Lin, Chen-Hua Yu, Szu-Wei Lu, Shin-Puu Jeng | 2019-07-09 |
| 10325991 | Transistor device | Jhen-Yu Tsai | 2019-06-18 |
| 10290513 | Carrier warpage control for three dimensional integrated circuit (3DIC) stacking | Jing-Cheng Lin, Chen-Hua Yu | 2019-05-14 |
| 10269762 | Rework process and tool design for semiconductor package | Justin Huang, Tsung-Fu Tsai, Jing-Cheng Lin, Chen-Hua Yu | 2019-04-23 |
| 10203252 | Microelectromechanical apparatus having a measuring range selector | Yu-Wen Hsu, Feng-Chia Hsu, Chao-Ta Huang | 2019-02-12 |
| 10157888 | Integrated fan-out packages and methods of forming the same | Jing-Cheng Lin, Tsung-Fu Tsai, Chen-Hua Yu, Po-Hao Tsai, Szu-Wei Lu +2 more | 2018-12-18 |
| 10153179 | Carrier warpage control for three dimensional integrated circuit (3DIC) stacking | Jing-Cheng Lin, Chen-Hua Yu | 2018-12-11 |