Issued Patents All Time
Showing 26–50 of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12112974 | Integrated circuit isolation feature and method of forming the same | Chih-Tang Peng, Shuen-Shin Liang, Teng-Chun Tsai | 2024-10-08 |
| 12094952 | Air spacer formation with a spin-on dielectric material | Ting-Ting Chen, Chen-Han Wang, Shuen-Shin Liang, Tsu-Hsiu Perng, Tsai-Jung Ho +3 more | 2024-09-17 |
| 12094947 | Semiconductor structure and method of manufacturing the same | Hung Yen, Ko-Feng Chen | 2024-09-17 |
| 12087819 | Dual channel structure | Mrunal A. Khaderbad, Dhanyakumar Mahaveer Sathaiya, Tzer-Min Shen | 2024-09-10 |
| 12080766 | Epitaxial backside contact | Chia-Hung Chu, Tsungyu Hung, Hsu-Kai Chang, Ding-Kang Shih, Pang-Yen Tsai +2 more | 2024-09-03 |
| 12074068 | Epitaxial structures for stacked semiconductor devices | Mrunal A. Khaderbad, Sathaiya Mahaveer DHANYAKUMAR, Huicheng Chang, Winnie Victoria Wei-Ning Chen | 2024-08-27 |
| 12057397 | Capping layer for liner-free conductive structures | Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Chun-Hsien Huang, Hung-Yi Huang +4 more | 2024-08-06 |
| 12051592 | Method and structure for barrier-less plug | Sung-Li Wang, Hung-Yi Huang, Yu-Yun Peng, Mrunal A. Khaderbad, Chia-Hung Chu +1 more | 2024-07-30 |
| 12034075 | Device of dielectric layer | Yu-Yun Peng | 2024-07-09 |
| 11996363 | Interconnect structure including a heat dissipation layer and methods of forming the same | Yu-Yun Peng | 2024-05-28 |
| 11972974 | Self-aligned barrier for metal vias | Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu +1 more | 2024-04-30 |
| 11942358 | Low thermal budget dielectric for semiconductor devices | Mrunal A. Khaderbad, Ko-Feng Chen, Zheng-Yong Liang, Chen-Han Wang, De-Yang Chiou +1 more | 2024-03-26 |
| 11942447 | Storage layers for wafer bonding | De-Yang Chiou, Fu-Ting Yen, Yu-Yun Peng | 2024-03-26 |
| 11935752 | Device of dielectric layer | Yu-Yun Peng, Chung-Chi Ko | 2024-03-19 |
| 11929327 | Liner-free conductive structures with anchor points | Hsu-Kai Chang, Sung-Li Wang, Shuen-Shin Liang, Chia-Hung Chu | 2024-03-12 |
| 11923367 | Low resistance fill metal layer material as stressor in metal gates | Mrunal A. Khaderbad, Ziwei Fang, Hsueh Wen Tsau | 2024-03-05 |
| 11908921 | Transistor isolation structures | Yu-Yun Peng, Fu-Ting Yen | 2024-02-20 |
| 11901220 | Bilayer seal material for air gaps in semiconductor devices | Shuen-Shin Liang, Chen-Han Wang, Tetsuji Ueno, Ting-Ting Chen | 2024-02-13 |
| 11894437 | Hybrid conductive structures | Shuen-Shin Liang, Chih-Chien Chi, Chien-Shun Liao, Kai-Ting Huang, Sung-Li Wang +4 more | 2024-02-06 |
| 11855214 | Inner spacers for gate-all-around semiconductor devices | Yu-Yun Peng, Fu-Ting Yen, Ting-Ting Chen, Tsu-Hsiu Perng | 2023-12-26 |
| 11855215 | Semiconductor device structure with high contact area | Shuen-Shin Liang, Pang-Yen Tsai, Sung-Li Wang, Pinyen Lin | 2023-12-26 |
| 11848238 | Methods for manufacturing semiconductor devices with tunable low-k inner air spacers | Chen-Han Wang, Shuen-Shin Liang, Tetsuji Ueno, Ting-Ting Chen | 2023-12-19 |
| 11837544 | Liner-free conductive structures with anchor points | Hsu-Kai Chang, Sung-Li Wang, Shuen-Shin Liang, Chia-Hung Chu | 2023-12-05 |
| 11823896 | Conductive structure formed by cyclic chemical vapor deposition | Mrunal A. Khaderbad, Shuen-Shin Liang, Sung-Li Wang, Yasutoshi Okuno, Yu-Yun Peng | 2023-11-21 |
| 11817384 | Interconnect structure and manufacturing method for the same | Shuen-Shin Liang, Ken-Yu Chang, Hung-Yi Huang, Chien-Kuo Chang, Chi-Hung Chuang +7 more | 2023-11-14 |