Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10978144 | Integrated circuit and operating method thereof | Chia-En Huang, Hidehiro Fujiwara, Yen-Huei Chen, Yih Wang | 2021-04-13 |
| 10972292 | I/O circuit design for SRAM-based PUF generators | Shih-Lien Linus Lu, Cheng Hung Lee, Chia-En Huang | 2021-04-06 |
| 10818327 | Memory circuit and method of operating same | Cheng Hung Lee, Shih-Lien Linus Lu | 2020-10-27 |
| 10770135 | Memory macro which changes operational modes | Pankaj Aggarwal, Ching-Wei Wu | 2020-09-08 |
| 10666438 | Balanced coupling structure for physically unclonable function (PUF) application | Cheng Hung Lee, Shih-Lien Linus Lu, Yi-Ju Chen | 2020-05-26 |
| 10511309 | Method and device to speed-up leakage based PUF generators under extreme operation conditions | Shih-Lien Linus Lu, Cheng-En Lee | 2019-12-17 |
| 10186313 | Memory macro disableable input-output circuits and methods of operating the same | Pankaj Aggarwal, Ching-Wei Wu | 2019-01-22 |
| 10164640 | Method and device to speed-up leakage based PUF generators under extreme operation conditions | Shih-Lien Linus Lu, Cheng-En Lee | 2018-12-25 |
| 9865335 | SRAM device capable of working in multiple low voltages without loss of performance | Pankaj Aggarwal, Cheng Hung Lee, Chien-Yuan Chen, Chiting Cheng, Hau-Tai Shieh +1 more | 2018-01-09 |
| 9589885 | Device having multiple-layer pins in memory MUX1 layout | Hung-Jen Liao, Jung-Hsuan Chen, Chien-Chi TIEN, Ching-Wei Wu, Hong-Chen Cheng +1 more | 2017-03-07 |
| 9583181 | SRAM device capable of working in multiple low voltages without loss of performance | Pankaj Aggarwal, Cheng Hung Lee, Chien-Yuan Chen, Chiting Cheng, Hau-Tai Shieh +1 more | 2017-02-28 |
| 9490005 | Memory circuit and method for routing the memory circuit | Cheng Hung Lee, Ching-Wei Wu, Kuang Ting Chen | 2016-11-08 |
| 9275724 | Method of writing to and reading data from a three-dimensional two port register file | Ching-Wei Wu | 2016-03-01 |
| 9230622 | Simultaneous two/dual port access on 6T SRAM | Ching-Wei Wu, Chia-Cheng Chen, Kuang Ting Chen, Wei-Shuo Kao | 2016-01-05 |
| 9129956 | Device having multiple-layer pins in memory MUX1 layout | Hung-Jen Liao, Jung-Hsuan Chen, Chien-Chi TIEN, Ching-Wei Wu, Hong-Chen Cheng +1 more | 2015-09-08 |
| 9001611 | Three-dimensional two port register file | Ching-Wei Wu | 2015-04-07 |
| 8565009 | Access to multi-port devices | Ching-Wei Wu, Lee Cheng Hung, Hung-Je Liao | 2013-10-22 |
| 8411479 | Memory circuits, systems, and methods for routing the memory circuits | Cheng Hung Lee, Ching-Wei Wu, Kuang Ting Chen | 2013-04-02 |
| 7923988 | Test equipment and test system using the same | — | 2011-04-12 |
| 7378655 | Apparatus and method for sensing electromagnetic radiation using a tunable device | Yu-Chong Tai, Matthieu Liger, Ming-Chia Wu | 2008-05-27 |
| 7336867 | Wavelength-selective 1×N2 switches with two-dimensional input/output fiber arrays | Ming-Chiang Wu | 2008-02-26 |
| 7072539 | Wavelength-selective 1×N2 switches with two-dimensional input/output fiber arrays | Ming-Chiang Wu | 2006-07-04 |