Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12283308 | Memory device and method for operating the same | Peijiun Lin, Ching-Wei Wu, Feng-Ming Chang | 2025-04-22 |
| 9851915 | Two-stage read/write 3D architecture for memory devices | Ching-Wei Wu | 2017-12-26 |
| 9690510 | Two-stage read/write 3D architecture for memory devices | Ching-Wei Wu | 2017-06-27 |
| 9490005 | Memory circuit and method for routing the memory circuit | Cheng Hung Lee, Jui-Che Tsai, Ching-Wei Wu | 2016-11-08 |
| 9281311 | Memory cell array including a write-assist circuit and embedded coupling capacitor and method of forming same | Ching-Wei Wu, Wei-Shuo Kao, Chia-Cheng Chen | 2016-03-08 |
| 9275752 | Read-only memory | Ching-Wei Wu | 2016-03-01 |
| 9230622 | Simultaneous two/dual port access on 6T SRAM | Ching-Wei Wu, Chia-Cheng Chen, Wei-Shuo Kao, Jui-Che Tsai | 2016-01-05 |
| 8837192 | N-bit rom cell | Ching-Wei Wu, Cheng Hung Lee | 2014-09-16 |
| 8675435 | Asymmetric sense amplifier design | Ching-Wei Wu, Cheng Hung Lee | 2014-03-18 |
| 8437210 | Asymmetric sense amplifier design | Ching-Wei Wu, Cheng Hung Lee | 2013-05-07 |
| 8411479 | Memory circuits, systems, and methods for routing the memory circuits | Cheng Hung Lee, Jui-Che Tsai, Ching-Wei Wu | 2013-04-02 |