Issued Patents All Time
Showing 26–46 of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6497993 | In situ dry etching procedure to form a borderless contact hole | Yuan-Hunh Chiu, Hun-Jan Tao, Chia-Shiung Tsai | 2002-12-24 |
| 6479385 | Interlevel dielectric composite layer for insulation of polysilicon and metal structures | Syun-Ming Jang | 2002-11-12 |
| 6461966 | Method of high density plasma phosphosilicate glass process on pre-metal dielectric application for plasma damage reducing and throughput improvement | Yao-Hsiang Chen, Syung-Ming Jang | 2002-10-08 |
| 6444566 | Method of making borderless contact having a sion buffer layer | Ming-Huan Tsai, Jyh-Huei Chen, Hun-Jan Tao | 2002-09-03 |
| 6426272 | Method to reduce STI HDP-CVD USG deposition induced defects | Li-Jen Chen | 2002-07-30 |
| 6423653 | Reduction of plasma damage for HDP-CVD PSG process | Syun-Ming Jang | 2002-07-23 |
| 6372664 | Crack resistant multi-layer dielectric layer and method for formation thereof | Syun-Ming Jang, Chen-Hua Yu | 2002-04-16 |
| 6365523 | Integrated high density plasma chemical vapor deposition (HDP-CVD) method and chemical mechanical polish (CMP) planarizing method for forming patterned planarized aperture fill layers | Syun-Ming Jang, Ying-Ho Chen | 2002-04-02 |
| 6316348 | High selectivity Si-rich SiON etch-stop layer | Chia-Shiung Tsai, Syun-Ming Jang | 2001-11-13 |
| 6274514 | HDP-CVD method for forming passivation layers with enhanced adhesion | Syun-Ming Jang | 2001-08-14 |
| 6261957 | Self-planarized gap-filling by HDPCVD for shallow trench isolation | Syun-Ming Jang | 2001-07-17 |
| 6245669 | High selectivity Si-rich SiON etch-stop layer | Chia-Shiung Tsai, Syun-Ming Jang | 2001-06-12 |
| 6245682 | Removal of SiON ARC film after poly photo and etch | Syun-Ming Jang | 2001-06-12 |
| 6228780 | Non-shrinkable passivation scheme for metal em improvement | So Wein Kuo, Syun-Ming Jang, Ruey-Lian Hwang | 2001-05-08 |
| 6214698 | Shallow trench isolation methods employing gap filling doped silicon oxide dielectric layer | Jhon Jhy Liaw, Jin-Yuan Lee, Kuei-Ying Lee, Kong-Beng Thei | 2001-04-10 |
| 6207483 | Method for smoothing polysilicon gate structures in CMOS devices | Chung-Long Chang, Syun-Ming Jang, Shwangming Jeng | 2001-03-27 |
| 6174808 | Intermetal dielectric using HDP-CVD oxide and SACVD O3-TEOS | Syun-Ming Jang | 2001-01-16 |
| 6174818 | Method of patterning narrow gate electrode | Hun-Jan Tao, Huan-Just Lin, Hung-Chang Hsieh, Ying-Ying Wang, Chia-Shiung Tsai +1 more | 2001-01-16 |
| 6090714 | Chemical mechanical polish (CMP) planarizing trench fill method employing composite trench fill layer | Syun-Ming Jang | 2000-07-18 |
| 6063711 | High selectivity etching stop layer for damascene process | Li-Chih Chao, Chia-Shiung Tsai, Jhon Jhy Liaw | 2000-05-16 |
| 6037018 | Shallow trench isolation filled by high density plasma chemical vapor deposition | Syun-Ming Jang, Chen-Hua Yu | 2000-03-14 |