Issued Patents All Time
Showing 76–100 of 111 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9537094 | Logic compatible RRAM structure and process | Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2017-01-03 |
| 9478638 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen | 2016-10-25 |
| 9466794 | Low form voltage resistive random access memory (RRAM) | Chin-Chieh Yang, Wen-Ting Chu, Yu-Wen Liao, Hsia-Wei Chen, Kuo-Chi Tu +1 more | 2016-10-11 |
| 9444045 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2016-09-13 |
| 9431604 | Resistive random access memory (RRAM) and method of making | Yu-Wen Liao, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Hsia-Wei Chen | 2016-08-30 |
| 9424917 | Method for operating RRAM memory | Wen-Ting Chu, Chia-Fu Lee | 2016-08-23 |
| 9425392 | RRAM cell structure with laterally offset BEVA/TEVA | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2016-08-23 |
| 9368722 | Resistive random access memory and manufacturing method thereof | Sheng-Hung Shih, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Chin-Chieh Yang +3 more | 2016-06-14 |
| 9356072 | Resistive random access memory (RRAM) structure | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang | 2016-05-31 |
| 9349953 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Chun You +2 more | 2016-05-24 |
| 9331277 | One transistor and one resistive random access memory (RRAM) structure with spacer | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Yu-Wen Liao | 2016-05-03 |
| 9312482 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2016-04-12 |
| 9286974 | Memory devices | Chia-Fu Lee, Wen-Ting Chu, Yue-Der Chih | 2016-03-15 |
| 9286973 | Device and method for forming resistive random access memory cell | Wen-Ting Chu, Yu-Wei Ting, Chun-Yang Tsai, Kuo-Ching Huang | 2016-03-15 |
| 9236570 | Resistive memory cell array with top electrode bit line | Wen-Ting Chu, Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang | 2016-01-12 |
| 9231205 | Low form voltage resistive random access memory (RRAM) | Chin-Chieh Yang, Wen-Ting Chu, Yu-Wen Liao, Hsia-Wei Chen, Kuo-Chi Tu +1 more | 2016-01-05 |
| 9231197 | Logic compatible RRAM structure and process | Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang | 2016-01-05 |
| 9224470 | Memory circuit and method of programming memory circuit | Yi-Chieh Chiu, Tassa Yang, Wen-Ting Chu | 2015-12-29 |
| 9172036 | Top electrode blocking layer for RRAM device | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2015-10-27 |
| 9130162 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2015-09-08 |
| 9112148 | RRAM cell structure with laterally offset BEVA/TEVA | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2015-08-18 |
| 9099647 | One transistor and one resistive (1T1R) random access memory (RAM) structure with dual spacers | Yu-Wen Liao, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Hsia-Wei Chen +1 more | 2015-08-04 |
| 9076522 | Memory cells breakdown protection | Wen-Chun You, Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang +2 more | 2015-07-07 |
| 9023699 | Resistive random access memory (RRAM) structure and method of making the RRAM structure | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang | 2015-05-05 |
| 8992792 | Method of fabricating an ultra low-k dielectric self-aligned via | Sean S. Kang, Chia-Ling Kao, Nikolaos Bekiaris | 2015-03-31 |