Issued Patents All Time
Showing 51–75 of 111 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10262731 | Device and method for forming resistive random access memory cell | Wen-Ting Chu, Yu-Wei Ting, Chun-Yang Tsai, Kuo-Ching Huang | 2019-04-16 |
| 10199575 | RRAM cell structure with laterally offset BEVA/TEVA | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang +2 more | 2019-02-05 |
| 10164185 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang +2 more | 2018-12-25 |
| 10163981 | Metal landing method for RRAM technology | Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang, Kuo-Chi Tu, Wen-Ting Chu +1 more | 2018-12-25 |
| 10158072 | Step height reduction of memory element | Jen-Sheng Yang, Wen-Ting Chu, Chin-Chieh Yang, Kuo-Chi Tu, Sheng-Hung Shih +3 more | 2018-12-18 |
| 10158070 | Logic compatible RRAM structure and process | Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2018-12-18 |
| 10103330 | Resistance variable memory structure | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2018-10-16 |
| 10103200 | Resistive switching random access memory with asymmetric source and drain | Chin-Chieh Yang, Hsia-Wei Chen, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2018-10-16 |
| 10050197 | Resistance variable memory structure | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2018-08-14 |
| 10038139 | One transistor and one resistive random access memory (RRAM) structure with spacer | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Yu-Wen Liao | 2018-07-31 |
| 10008662 | Perpendicular magnetic tunneling junction (MTJ) for improved magnetoresistive random-access memory (MRAM) process | Wen-Chun You, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih +2 more | 2018-06-26 |
| 9960275 | Method of fabricating air-gap spacer for N7/N5 finFET and beyond | Raymond Hung, Tatsuya Sato, Nam Sung Kim, Shiyu Sun, Bingxi Wood | 2018-05-01 |
| 9941470 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chin-Chieh Yang, Kuo-Chi Tu, Sheng-Hung Shih, Wen-Ting Chu +2 more | 2018-04-10 |
| 9934853 | Method and apparatus for reading RRAM cell | Chin-Chieh Yang, Chang-Sheng Liao, Hsia-Wei Chen, Jen-Sheng Yang, Kuo-Chi Tu +4 more | 2018-04-03 |
| 9899079 | Memory devices | Chia-Fu Lee, Wen-Ting Chu, Yue-Der Chih | 2018-02-20 |
| 9853213 | Logic compatible RRAM structure and process | Hsia-Wei Chen, Chin-Chieh Yang, Kuo-Chi Tu, Wen-Ting Chu, Yu-Wen Liao | 2017-12-26 |
| 9847481 | Metal landing on top electrode of RRAM | Wen-Ting Chu | 2017-12-19 |
| 9818938 | Method of forming a semiconductor structure | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2017-11-14 |
| 9780302 | Top electrode for device structures in interconnect | Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chin-Chieh Yang, Yu-Wen Liao +2 more | 2017-10-03 |
| 9780145 | Resistive random access memory (RRAM) structure | Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang | 2017-10-03 |
| 9773552 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang +2 more | 2017-09-26 |
| 9673391 | Resistance variable memory structure and method of forming the same | Kuo-Chi Tu, Hsia-Wei Chen, Yu-Wen Liao, Chin-Chieh Yang, Wen-Ting Chu | 2017-06-06 |
| 9627060 | Memory circuit and method of programming memory circuit | Yi-Chieh Chiu, Tassa Yang, Wen-Ting Chu | 2017-04-18 |
| 9577009 | RRAM cell with PMOS access transistor | Sheng-Hung Shih, Kuo-Chi Tu, Hsia-Wei Chen, Chin-Chieh Yang, Jen-Sheng Yang +2 more | 2017-02-21 |
| 9553265 | RRAM device with data storage layer having increased height | Jen-Sheng Yang, Chin-Chieh Yang, Kuo-Chi Tu, Sheng-Hung Shih, Wen-Ting Chu +2 more | 2017-01-24 |