Issued Patents All Time
Showing 151–175 of 196 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8569837 | MOS devices having elevated source/drain regions | Hung-Wei Chen, Chung-Hu Ke, Ta-Ming Kuan, Wen-Chin Lee | 2013-10-29 |
| 8569146 | Isolation structure for strained channel transistors | Yee-Chia Yeo, Wen-Chin Lee, Chung-Hu Ge | 2013-10-29 |
| 8536619 | Strained MOS device and methods for forming the same | Ta-Ming Kuan, Wen-Chin Lee | 2013-09-17 |
| 8497528 | Method for fabricating a strained structure | Tsung-Lin Lee, Chih-Hao Chang, Feng Yuan, Jeff J. Xu | 2013-07-30 |
| 8486770 | Method of forming CMOS FinFET device | Cheng-Hsien Wu, Clement Hsingjen Wann | 2013-07-16 |
| 8455929 | Formation of III-V based devices on semiconductor substrates | Clement Hsingjen Wann | 2013-06-04 |
| 8455860 | Reducing source/drain resistance of III-V based transistors | Clement Hsingjen Wann | 2013-06-04 |
| 8426298 | CMOS devices with Schottky source and drain regions | Hung-Wei Chen, Chung-Hu Ke, Wen-Chin Lee | 2013-04-23 |
| 8426890 | Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces | Cheng-Hsien Wu, Clement Hsingjen Wann | 2013-04-23 |
| 8299508 | CMOS structure with multiple spacers | Bor Chiuan Hsieh, Han-Ping Chung, Bor-Wen Chan, Hun-Jan Tao | 2012-10-30 |
| 8253167 | Method for forming antimony-based FETs monolithically | Heng-Kuang Lin, Pei-Chin Chiu, Jen-Inn Chyi, Han-Chieh Ho, Clement Hsingjen Wann +1 more | 2012-08-28 |
| 8242540 | Epitaxial growth of III-V compound semiconductors on silicon surfaces | Clement Hsingjen Wann, Cheng-Hsien Wu | 2012-08-14 |
| 8236658 | Methods for forming a transistor with a strained channel | Ta-Ming Kuan, Wen-Chin Lee | 2012-08-07 |
| 8183134 | Semiconductor device and manufacturing method with improved epitaxial quality of III-V compound on silicon surfaces | Cheng-Hsien Wu, Clement Hsingjen Wann | 2012-05-22 |
| 8154107 | Semiconductor device and a method of fabricating the device | Chung-Hu Ke, Wen-Chin Lee | 2012-04-10 |
| 8084305 | Isolation spacer for thin SOI devices | Wen-Chin Lee, Yee-Chia Yeo, Chung-Hu Ke | 2011-12-27 |
| 8053304 | Method of forming high-mobility devices including epitaxially growing a semiconductor layer on a dislocation-blocking layer in a recess formed in a semiconductor substrate | — | 2011-11-08 |
| 8039284 | Dual metal silicides for lowering contact resistance | Chung-Hu Ke, Hung-Wei Chen, Wen-Chin Lee | 2011-10-18 |
| 7985652 | Metal stress memorization technology | Chung-Hu Ke, Ta-Ming Kuan, Wen-Chin Lee | 2011-07-26 |
| 7928474 | Forming embedded dielectric layers adjacent to sidewalls of shallow trench isolation regions | Hong-Nien Lin, Wen-Chin Lee | 2011-04-19 |
| 7867860 | Strained channel transistor formation | Yi-Chun Huang, Yen-Ping Wang | 2011-01-11 |
| 7803718 | BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture | Tzu-Juei Wang, Hung-Wei Chen, Chung-Hu Ke, Wen-Chin Lee | 2010-09-28 |
| 7745904 | Shallow trench isolation structure for semiconductor device | Chung-Hu Ke, Chien-Chao Huang | 2010-06-29 |
| 7737532 | Hybrid Schottky source-drain CMOS for high mobility and low barrier | Chung-Hu Ke, Hung-Wei Chen, Wen-Chin Lee, Min-hwa Chi | 2010-06-15 |
| 7646068 | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit | Wen-Chin Lee, Yee-Chia Yeo, Chun-Chieh Lin, Chenming Hu | 2010-01-12 |