Issued Patents All Time
Showing 26–50 of 164 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8097924 | Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same | Chih-Hao Wang, Shang-Chih Chen, Yen-Ping Wang, Hsien-Kuang Chiu, Liang-Gi Yao | 2012-01-17 |
| 8067280 | High performance CMOS devices and methods for making same | Chih-Hao Wang, Ta-Wei Wang | 2011-11-29 |
| 8062946 | Strained channel transistor structure with lattice-mismatched zone and fabrication method thereof | Yee-Chia Yeo, Chun-Chieh Lin, Wen-Chin Lee | 2011-11-22 |
| 8053839 | Doping of semiconductor fin devices | Yee-Chia Yeo, Ping-Wei Wang, Hao Chen, Fu-Liang Yang | 2011-11-08 |
| 7943986 | Method for fabricating a body contact in a finfet structure and a device including the same | Kuo-Nan Yang, Yi Chen, Hou-Yu Chen, Fu-Liang Yang | 2011-05-17 |
| 7892901 | Strained silicon-on-insulator transistors with mesa isolation | Yee-Chia Yeo | 2011-02-22 |
| 7888201 | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors | Yee-Chia Yeo, Fu-Liang Yang | 2011-02-15 |
| 7875959 | Semiconductor structure having selective silicide-induced stress and a method of producing same | Chung-Hu Ke, Wen-Chin Lee | 2011-01-25 |
| 7863674 | Multiple-gate transistors formed on bulk substrates | Yee-Chia Yeo, Fu-Liang Yang | 2011-01-04 |
| 7851276 | Methods and structures for planar and multiple-gate transistors formed on SOI | Fu-Liang Yang, Yee-Chia Yeo | 2010-12-14 |
| 7745279 | Capacitor that includes high permittivity capacitor dielectric | Yee-Chia Yeo | 2010-06-29 |
| 7700267 | Immersion fluid for immersion lithography, and method of performing immersion lithography | Yee-Chia Yeo, Burn Jeng Lin | 2010-04-20 |
| 7701008 | Doping of semiconductor fin devices | Yee-Chia Yeo, Ping-Wei Wang, Hao Chen, Fu-Liang Yang | 2010-04-20 |
| 7652378 | Aluminum-based interconnection in bond pad layer | Horng-Huei Tseng | 2010-01-26 |
| 7646068 | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit | Chih-Hsin Ko, Wen-Chin Lee, Yee-Chia Yeo, Chun-Chieh Lin | 2010-01-12 |
| 7635632 | Gate electrode for a semiconductor fin device | Yee-Chia Yeo, Hao Chen, Fu-Liang Yang | 2009-12-22 |
| 7625806 | Method of fabricating a non-floating body device with enhanced performance | Horng-Huei Tseng, Jhy-Chyum Guo, Da-Chi Lin | 2009-12-01 |
| 7579135 | Lithography apparatus for manufacture of integrated circuits | Yee-Chia Yeo | 2009-08-25 |
| 7514730 | Method of fabricating a non-floating body device with enhanced performance | Horng-Huei Tseng, Jhy-Chyum Guo, Da-Chi Lin | 2009-04-07 |
| 7498641 | Partial replacement silicide gate | Chih-Hao Wang, Yen-Ping Wang | 2009-03-03 |
| 7495267 | Semiconductor structure having a strained region and a method of fabricating same | Wen-Chin Lee, Chung-Hu Ge | 2009-02-24 |
| 7459756 | Method for forming a device having multiple silicide types | Chun-Chieh Lin, Wen-Chin Lee, Yee-Chia Yeo, Chuan-Yi Lin | 2008-12-02 |
| 7452778 | Semiconductor nano-wire devices and methods of fabrication | Hung-Wei Chen, Yee-Chia Yeo, Di-Hong Lee, Fu-Liang Yang | 2008-11-18 |
| 7452805 | Aluminum based conductor for via fill and interconnect | Chao-Hsiung Wang, Chien-Chao Huang, Horng-Huei Tseng | 2008-11-18 |
| 7453133 | Silicide/semiconductor structure and method of fabrication | Wen-Chin Lee, Chung-Hu Ge | 2008-11-18 |