Issued Patents All Time
Showing 1,901–1,925 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5858621 | Bi-layer silylation process using anti-reflective-coatings (ARC) for making distortion-free submicrometer photoresist patterns | Chia-Shiung Tsai | 1999-01-12 |
| 5858623 | Method for attenuating photoresist layer outgassing | Syun-Ming Jang, Tsung-Hou Li | 1999-01-12 |
| 5856227 | Method of fabricating a narrow polycide gate structure on an ultra-thin gate insulator layer | Chia-Shiung Tsai | 1999-01-05 |
| 5833817 | Method for improving conformity and contact bottom coverage of sputtered titanium nitride barrier layers | Chia-Shiung Tsai, Ying Wang | 1998-11-10 |
| 5817571 | Multilayer interlevel dielectrics using phosphorus-doped glass | Syun-Ming Jang, Huang Yuan-Chang | 1998-10-06 |
| 5817566 | Trench filling method employing oxygen densified gap filling silicon oxide layer formed with low ozone concentration | Syun-Ming Jang, Ying-Ho Chen | 1998-10-06 |
| 5817567 | Shallow trench isolation method | Syun-Ming Jang, Ying-Ho Chen | 1998-10-06 |
| 5811345 | Planarization of shallow- trench- isolation without chemical mechanical polishing | Syun-Ming Jang | 1998-09-22 |
| 5795833 | Method for fabricating passivation layers over metal lines | Yao-Yi Cheng | 1998-08-18 |
| 5786260 | Method of fabricating a readable alignment mark structure using enhanced chemical mechanical polishing | Syun-Ming Jang, Ying-Ho Chen, Chung-Long Chang | 1998-07-28 |
| 5773360 | Reduction of surface contamination in post-CMP cleaning | Chung-Long Chang, Syun-Ming Jang | 1998-06-30 |
| 5753418 | 0.3 Micron aperture width patterning process | Chia-Shiung Tsai, Yuan-Chang Huang | 1998-05-19 |
| 5747373 | Nitride-oxide sidewall spacer for salicide formation | — | 1998-05-05 |
| 5747380 | Robust end-point detection for contact and via etching | Syun-Ming Jang | 1998-05-05 |
| 5747381 | Technique for the removal of residual spin-on-glass (SOG) after full SOG etchback | Lin-June Wu, Jin-Yuan Lee | 1998-05-05 |
| 5744395 | Low resistance, self-aligned, titanium silicide structures, using a single rapid thermal anneal procedure | Shau-Lin Shue | 1998-04-28 |
| 5741740 | Shallow trench isolation (STI) method employing gap filling silicon oxide dielectric layer | Syun-Ming Jang, Ying-Ho Chen | 1998-04-21 |
| 5731241 | Self-aligned sacrificial oxide for shallow trench isolation | Syun-Ming Jang, Ying-Ho Chen | 1998-03-24 |
| 5728619 | Selective reactive Ion etch (RIE) method for forming a narrow line-width high aspect ratio via through an integrated circuit layer | Chia-Shiung Tsai | 1998-03-17 |
| 5726090 | Gap-filling of O.sub.3 -TEOS for shallow trench isolation | Syun-Ming Jang, Ying-Ho Chen | 1998-03-10 |
| 5721172 | Self-aligned polish stop layer hard masking method for forming planarized aperture fill layers | Syun-Ming Jang, Ying-Ho Chen | 1998-02-24 |
| 5702977 | Shallow trench isolation method employing self-aligned and planarized trench fill dielectric layer | Syun-Ming Jang, Ying-Ho Chen | 1997-12-30 |
| 5702980 | Method for forming intermetal dielectric with SOG etchback and CMP | Sylin-Ming Jang | 1997-12-30 |
| 5700737 | PECVD silicon nitride for etch stop mask and ozone TEOS pattern sensitivity elimination | Syun-Ming Jang | 1997-12-23 |
| 5679606 | method of forming inter-metal-dielectric structure | Chin-Kun Wang, Lu-Min Lin | 1997-10-21 |