Issued Patents All Time
Showing 1,926–1,950 of 1,955 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5674784 | Method for forming polish stop layer for CMP process | Syun-Ming Jang | 1997-10-07 |
| 5674783 | Method for improving the chemical-mechanical polish (CMP) uniformity of insulator layers | Syun-Ming Jang | 1997-10-07 |
| 5656545 | Elimination of tungsten dimple for stacked contact or via application | — | 1997-08-12 |
| 5654240 | Integrated circuit fabrication having contact opening | Kuo-Hua Lee | 1997-08-05 |
| 5654233 | Step coverage enhancement process for sub half micron contact/via | — | 1997-08-05 |
| 5654234 | Method for forming a void-free tungsten-plug contact in the presence of a contact opening overhang | Tsu Shih | 1997-08-05 |
| 5631197 | Sacrificial etchback layer for improved spin-on-glass planarization | Syun-Ming Jang, Lung Chen, Yuan-Chang Huang | 1997-05-20 |
| 5599730 | Poly-buffered LOCOS | Kuo-Hua Lee | 1997-02-04 |
| 5599740 | Deposit-etch-deposit ozone/teos insulator layer method | Syun-Ming Jang | 1997-02-04 |
| 5591674 | Integrated circuit with silicon contact to silicide | Kuo-Hua Lee | 1997-01-07 |
| 5559052 | Integrated circuit fabrication with interlevel dielectric | Kuo-Hua Lee | 1996-09-24 |
| 5552017 | Method for improving the process uniformity in a reactor by asymmetrically adjusting the reactant gas flow | Syun-Ming Jang | 1996-09-03 |
| 5552344 | Non-etchback self-aligned via size reduction method employing ozone assisted chemical vapor deposited silicon oxide | Syun-Ming Jang | 1996-09-03 |
| 5518959 | Method for selectively depositing silicon oxide spacer layers | Syun-Ming Jang, Lung Chen, Lin-June Wu | 1996-05-21 |
| 5468669 | Integrated circuit fabrication | Kuo-Hua Lee, Horng-Dar Lin, Ran-Hong Yan | 1995-11-21 |
| 5451435 | Method for forming dielectric | — | 1995-09-19 |
| 5431770 | Transistor gate formation | Kuo-Hua Lee | 1995-07-11 |
| 5418173 | Method of reducing ionic contamination in integrated circuit fabrication | Kuo-Hua Lee | 1995-05-23 |
| 5416033 | Integrated circuit and manufacture | Kuo-Hua Lee, Chung-Ting Liu, Kurt G. Steiner | 1995-05-16 |
| 5411899 | Transistor fabrication of a twin tub using angled implant | Kuo-Hua Lee | 1995-05-02 |
| 5399532 | Integrated circuit window etch and planarization | Kuo-Hua Lee | 1995-03-21 |
| 5395799 | Method of fabricating semiconductor devices having electrodes comprising layers of doped tungsten disilicide | — | 1995-03-07 |
| 5366557 | Method and apparatus for forming integrated circuit layers | — | 1994-11-22 |
| 5302555 | Anisotropic deposition of dielectrics | — | 1994-04-12 |
| 5281557 | Soluble oxides for integrated circuit fabrication formed by the incomplete dissociation of the precursor gas | — | 1994-01-25 |