TK

TaeWoo Kang

SC Stats Chippac: 19 patents #50 of 425Top 15%
Samsung: 3 patents #30,683 of 75,807Top 45%
Overall (All Time): #193,368 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11715697 Semiconductor packages including at least one supporting portion Sungbum Kim, Jaewon Choi 2023-08-01
10651074 Substrate processing apparatus and method of manufacture using the same Kyoung Hwan Kim, Byung-Lyul Park, Hyungjun Jeon 2020-05-12
9922897 Method of manufacturing semiconductor package Kyoung Hwan Kim, Byung-Lyul Park, Hyungjun Jeon 2018-03-20
9773685 Solder joint flip chip interconnection having relief structure Rajendra D. Pendse, KyungOe Kim 2017-09-26
9373573 Solder joint flip chip interconnection Rajendra D. Pendse, KyungOe Kim 2016-06-21
8901734 Semiconductor device and method of forming column interconnect structure to reduce wafer stress SungWon Cho 2014-12-02
8810029 Solder joint flip chip interconnection Rajendra D. Pendse, KyungOe Kim 2014-08-19
8779570 Stackable integrated circuit package system Seong Bo Shim, Yong Hee Kang 2014-07-15
8703541 Electronic system with expansion feature Haengcheol Choi, Ki Youn Jang, Il Kwon Shim 2014-04-22
RE44761 Solder joint flip chip interconnection having relief structure Rajendra D. Pendse, KyungOe Kim 2014-02-11
RE44608 Solder joint flip chip interconnection Rajendra D. Pendse, KyungOe Kim 2013-11-26
RE44562 Solder joint flip chip interconnection having relief structure Rajendra D. Pendse, KyungOe Kim 2013-10-29
8216930 Solder joint flip chip interconnection having relief structure Rajendra D. Pendse, KyungOe Kim 2012-07-10
8211746 Integrated circuit packaging system with lead frame and method of manufacture thereof Jong-Woo Ha, DongSoo Moon 2012-07-03
8178392 Electronic system with expansion feature Haengcheol Choi, Ki Youn Jang, Il Kwon Shim 2012-05-15
8173536 Semiconductor device and method of forming column interconnect structure to reduce wafer stress SungWon Cho 2012-05-08
8129841 Solder joint flip chip interconnection Rajendra D. Pendse, KyungOe Kim 2012-03-06
8018052 Integrated circuit package system with side substrate having a top layer KyungOe Kim, HyunSu Shin 2011-09-13
7951643 Integrated circuit packaging system with lead frame and method of manufacture thereof Jong-Woo Ha, DongSoo Moon 2011-05-31
7875495 Standoff height improvement for bumping technology using solder resist YoRim Lee, TaeKeun Lee 2011-01-25
7659633 Solder joint flip chip interconnection having relief structure Rajendra D. Pendse, KyungOe Kim 2010-02-09
7615865 Standoff height improvement for bumping technology using solder resist YoRim Lee, TaeKeun Lee 2009-11-10