Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12211778 | Semiconductor device and method of forming bump pad array on substrate for ground connection for heat sink/shielding structure | Hermes T. Apale, Mark Sackett | 2025-01-28 |
| 11775729 | Technology file process rule validation | Phaniraj Joshi, Pilwon Kang, Youngrog Jo, Zameer Iqbal, Nitin Kishorkumar Ingole | 2023-10-03 |
| 11764136 | Semiconductor device and method of forming bump pad array on substrate for ground connection for heat sink/shielding structure | Hermes T. Apale, Mark Sackett | 2023-09-19 |
| 9401347 | Semiconductor device and method of forming a shielding layer over a semiconductor die disposed in a cavity of an interconnect structure and grounded through the die TSV | SinJae Lee, JinGwan Kim, JiHoon Oh, Jaehyun LIM | 2016-07-26 |
| 9082887 | Integrated circuit packaging system with posts and method of manufacture thereof | DaeSik Choi, Taewoo Lee, SungWon Cho | 2015-07-14 |
| 8937371 | Semiconductor device and method of forming a shielding layer over a semiconductor die disposed in a cavity of an interconnect structure and grounded through the die TSV | SinJae Lee, JinGwan Kim, JiHoon Oh, Jaehyun LIM | 2015-01-20 |
| 8932908 | Semiconductor device and method of forming partially-etched conductive layer recessed within substrate for bonding to semiconductor die | HyunSu Shin, Hun Jeong, JinGwan Kim, SunYoung Chun | 2015-01-13 |
| 8574964 | Semiconductor device and method of forming electrical interconnection between semiconductor die and substrate with continuous body of solder tape | SungWon Cho, Taewoo Lee, DaeSik Choi | 2013-11-05 |
| 8531012 | Semiconductor device and method of forming a shielding layer over a semiconductor die disposed in a cavity of an interconnect structure and grounded through the die TSV | SinJae Lee, JinGwan Kim, JiHoon Oh, Jaehyun LIM | 2013-09-10 |
| 8519544 | Semiconductor device and method of forming WLCSP structure using protruded MLP | OhHan Kim, SungWon Cho, DaeSik Choi, DongSoo Moo | 2013-08-27 |
| 8502387 | Integrated circuit packaging system with vertical interconnection and method of manufacture thereof | DaeSik Choi, Taewoo Lee, SungWon Cho | 2013-08-06 |
| 8502392 | Semiconductor device with partially-etched conductive layer recessed within substrate for bonding to semiconductor die | HyunSu Shin, Hun Jeong, JinGwan Kim, SunYoung Chun | 2013-08-06 |
| 8432028 | Integrated circuit packaging system with package-on-package and method of manufacture thereof | JinGwan Kim, MoonKi Jeong, SunYoung Chun, JiHoon Oh | 2013-04-30 |
| 8310038 | Integrated circuit packaging system with embedded conductive structure and method of manufacture thereof | JinGwan Kim, JiHoon Oh, JongVin Park | 2012-11-13 |
| 8288202 | Method of forming partially-etched conductive layer recessed within substrate for bonding to semiconductor die | HyunSu Shin, Hun Jeong, JinGwan Kim, SunYoung Chun | 2012-10-16 |
| 8273604 | Semiconductor device and method of forming WLCSP structure using protruded MLP | OhHan Kim, SungWon Cho, DaeSik Choi, DongSoo Moo | 2012-09-25 |
| 8004093 | Integrated circuit package stacking system | JiHoon Oh, JinGwan Kim, Jaehyun LIM, SunYoung Chun, SinJae Lee +1 more | 2011-08-23 |
| 7683469 | Package-on-package system with heat spreader | JiHoon Oh, Jaehyun LIM, JongVin Park, SinJae Lee | 2010-03-23 |