Issued Patents All Time
Showing 26–50 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10878317 | Method and system for performing analog complex vector-matrix multiplication | Ryan M. Hatcher, Jorge A. Kittl, Borna J. Obradovic | 2020-12-29 |
| 10872662 | 2T2R binary weight cell with high on/off ratio background | Ryan M. Hatcher, Jorge A. Kittl, Rwik Sengupta, Dharmendar Reddy Palle, Joon Goo Hong | 2020-12-22 |
| 10868193 | Nanosheet field effect transistor cell architecture | Rwik Sengupta, Mark S. Rodder, Joon Goo Hong | 2020-12-15 |
| 10861950 | Integrated circuit including field effect transistors having a contact on active gate compatible with a small cell area having a small contacted poly pitch | Rwik Sengupta, Mark S. Rodder, Joon Goo Hong | 2020-12-08 |
| 10860923 | High-density neuromorphic computing element | Borna J. Obradovic, Mark S. Rodder | 2020-12-08 |
| 10854591 | Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the same | Wei-E Wang, Borna J. Obradovic, Chris Bowen, Mark S. Rodder | 2020-12-01 |
| 10832774 | Variation resistant 3T3R binary weight cell with low output current and high on/off ratio | Ryan M. Hatcher, Jorge A. Kittl, Rwik Sengupta, Dharmendar Reddy Palle, Joon Goo Hong | 2020-11-10 |
| 10790002 | Giant spin hall-based compact neuromorphic cell optimized for differential read inference | Ryan M. Hatcher, Jorge A. Kittl | 2020-09-29 |
| 10739186 | Bi-directional weight cell | Ryan M. Hatcher, Jorge A. Kittl, Borna J. Obradovic | 2020-08-11 |
| 10679688 | Ferroelectric-based memory cell usable in on-logic chip memory | Borna J. Obradovic, Ryan M. Hatcher, Jorge A. Kittl | 2020-06-09 |
| 10636871 | Silicon and silicon germanium nanowire structures | Kelin J. Kuhn, Seiyon Kim, Rafael Rios, Stephen M. Cea, Martin D. Giles +3 more | 2020-04-28 |
| 10614868 | Memory device with strong polarization coupling | Jorge A. Kittl, Borna J. Obradovic, Ryan M. Hatcher | 2020-04-07 |
| 10585630 | Selectorless 3D stackable memory | Borna J. Obradovic, Ryan M. Hatcher, Vladimir Nikitin, Dmytro Apalkov | 2020-03-10 |
| 10585254 | Vertical optical via and method of fabrication | Daniel N. Carothers | 2020-03-10 |
| 10461751 | FE-FET-based XNOR cell usable in neuromorphic computing | Borna J. Obradovic, Ryan M. Hatcher, Jorge A. Kittl | 2019-10-29 |
| 10424581 | Sub 59 MV/decade SI CMOS compatible tunnel FET as footer transistor for power gating | Mark S. Rodder, Rwik Sengupta | 2019-09-24 |
| 10084058 | Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains | Prashant Majhi, Mantu K. Hudait, Jack T. Kavalieros, Ravi Pillarisetty, Marko Radosavljevic +2 more | 2018-09-25 |
| 10026751 | Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the same | Borna J. Obradovic, Rwik Sengupta, Wei-E Wang, Ryan M. Hatcher, Mark S. Rodder | 2018-07-17 |
| 10008580 | FET including an InGaAs channel and method of enhancing performance of the FET | Borna J. Obradovic, Mark S. Rodder | 2018-06-26 |
| 9966137 | Low power analog or multi-level memory for neuromorphic computing | Borna J. Obradovic | 2018-05-08 |
| 9960232 | Horizontal nanosheet FETs and methods of manufacturing the same | Borna J. Obradovic, Mark S. Rodder | 2018-05-01 |
| 9812449 | Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitance | Borna J. Obradovic, Mark S. Rodder, Wei-E Wang | 2017-11-07 |
| 9805795 | Zero leakage, high noise margin coupled giant spin hall based retention latch | Borna J. Obradovic | 2017-10-31 |
| 9806193 | Stress in trigate devices using complimentary gate fill materials | Martin D. Giles, Ravi Pillarisetty, Jack T. Kavalieros | 2017-10-31 |
| 9793403 | Multi-layer fin field effect transistor devices and methods of forming the same | Borna J. Obradovic, Robert C. Bowen, Wei-E Wang, Mark S. Rodder | 2017-10-17 |