Issued Patents All Time
Showing 26–50 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7568024 | Method for deciding network manager in home network | Seung-Cheon Kim, Sang-Wook Lim | 2009-07-28 |
| 7560332 | Integrated circuit capacitor structure | Wan Jae Park, Jeong Hoon Ahn, Kyung-Tae Lee, Mu-kyeng Jung, Yong Jun Lee +2 more | 2009-07-14 |
| 7534678 | Methods of forming CMOS integrated circuit devices having stressed NMOS and PMOS channel regions therein and circuits formed thereby | Ja-Hum Ku, Jae-eon Park | 2009-05-19 |
| 7462507 | Structure of a CMOS image sensor and method for fabricating the same | Soo-geun Lee, Ki-Chul Park | 2008-12-09 |
| 7435673 | Methods of forming integrated circuit devices having metal interconnect structures therein | Ja-Hum Ku, Duk-Ho Hong, Wan Jae Park | 2008-10-14 |
| 7417302 | Semiconductor device and method of manufacturing the same | Hong-Jae Shin, Jeong Hoon Ahn, Seung-Man Choi, Byung-jun Oh, Yoon-Hae Kim | 2008-08-26 |
| 7399700 | Dual damascene interconnection with metal-insulator-metal capacitor and method of fabricating | Soo-geun Lee | 2008-07-15 |
| 7400003 | Structure of a CMOS image sensor and method for fabricating the same | Soo-geun Lee, Ki-Chul Park | 2008-07-15 |
| 7387962 | Physical vapor deposition methods for forming hydrogen-stuffed trench liners for copper-based metallization | Seung-Man Choi | 2008-06-17 |
| 7365025 | Methods of forming dual-damascene interconnect structures on semiconductor substrates using multiple planarization layers having different porosity characteristics | Seung-Man Choi, Ja-Hum Ku, Ki-Chul Park, Sun-Oo Kim | 2008-04-29 |
| 7323407 | Method of fabricating dual damascene interconnections of microelectronic device using diffusion barrier layer against base material | Jae-yeol Maeng, Jae Hak Kim, Il-whan Oh, Hong-Jae Shin | 2008-01-29 |
| 7307014 | Method of forming a via contact structure using a dual damascene process | Jae Hak Kim, Hong-Jae Shin, Young-joon Moon, Seo-woo Nam | 2007-12-11 |
| 7282451 | Methods of forming integrated circuit devices having metal interconnect layers therein | Duk-Ho Hong, Markus Naujok, Roman Knoefler | 2007-10-16 |
| 7279733 | Dual damascene interconnection with metal-insulator-metal-capacitor and method of fabricating the same | Soo-geun Lee | 2007-10-09 |
| 7229875 | Integrated circuit capacitor structure | Wan Jae Park, Jeong Hoon Ahn, Kyung-Tae Lee, Mu-kyeng Jung, Yong Jun Lee +2 more | 2007-06-12 |
| 7205666 | Interconnections having double capping layer and method for forming the same | Soo-geun Lee, Ki-Chul Park, Won-sang Song | 2007-04-17 |
| 7192864 | Method of forming interconnection lines for semiconductor device | Hong-Jae Shin, Jae Hak Kim, Young-Jin Wee, Seung Jin Lee, Ki-Kwan Park | 2007-03-20 |
| 7183195 | Method of fabricating dual damascene interconnections of microelectronic device using hybrid low k-dielectric and carbon-free inorganic filler | Soo-geun Lee, Wan Jae Park, Jae Hak Kim, Hong-Jae Shin | 2007-02-27 |
| 7157366 | Method of forming metal interconnection layer of semiconductor device | Il-Goo Kim, Sang-rok Hah, Sae-il Son | 2007-01-02 |
| 7064059 | Method of forming dual damascene metal interconnection employing sacrificial metal oxide layer | Jae Hak Kim, Young-joon Moon, Jeong-Wook Hwang | 2006-06-20 |
| 7037835 | Interconnections having double capping layer and method for forming the same | Soo-geun Lee, Ki-Chul Park, Won-sang Song | 2006-05-02 |
| 7033944 | Dual damascene process | Wan Jae Park, Il-Goo Kim, Sang-rok Hah | 2006-04-25 |
| 7022600 | Method of forming dual damascene interconnection using low-k dielectric material | Jae Hak Kim, Soo-geun Lee, Ki-Kwan Park | 2006-04-04 |
| 6953745 | Void-free metal interconnection structure and method of forming the same | Jeong Hoon Ahn, Hyo-Jong Lee, Kyung-Tae Lee, Soo-geun Lee, Bong Seok Suh | 2005-10-11 |
| 6936533 | Method of fabricating semiconductor devices having low dielectric interlayer insulation layer | Jae Hak Kim, Hong-Jae Shin, Soo-geun Lee | 2005-08-30 |